Semiconductor structures and methods of forming them

Abstract

A semiconductor structure and a forming method thereof are provided. The forming method comprises a semiconductor substrate, and a shallow groove isolating structure is formed in the substrate; a plurality of gate structures are formed on the substrate, a part of the gate structures are on the surface of the substrate, a part of the gate structures cover a part of the surface of the shallow groove isolating structure, and each gate structure comprises a gate medium layer, a cap layer on the surface of the gate medium layer, and a fake gate on the surface of the cap layer; a mask layer is formed on the substrate and exposes the shallow groove isolating structure and side walls on one sides of the gate structures on the surface of the shallow groove isolating structure; the cap layer on the shallow groove isolating structure is etched along the exposed side walls of the gate structures, and a part of the cap layer on the shallow groove isolating structure is removed to form a groove; the mask layer is removed, and a side wall is formed on the surface of the side walls of the gate structure and fills the groove. The method can improve the performance of the formed semiconductor structure.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the continuous improvement of the integration level of semiconductor devices and the reduction of technology nodes, the traditional gate dielectric layer continues to become thinner, and the leakage of transistors increases accordingly, causing problems such as waste of power consumption of semiconductor devices. In order to solve the above problems, the prior art provides a solution of replacing the polysilicon gate with a metal gate. Among them, the "gate last" process is a main process for forming high-K metal gate transistors. [0003] The "gate last" process includes two methods: "high-K first" and "high-K last". Wherein, the "high-K first (high-K first)" method includes: including: providing a semiconductor substrate, a dummy gate structure is formed on the semiconductor subs...

AI Technical Summary

Problems solved by technology

In the process of forming the metal silicide layer 32, a metal layer is formed on the surface of the source and drain electrodes 31, and through annealing, the metal layer reacts with the surface of the source and drain electrodes 31 to form a metal silicide layer 32, which is then removed by a wet etching process. The metal layer that does not react with silicon to form metal silicide, and the wet etching process will corrode the capping layer on the surface of the shallow trench isolation structure at the same time, so that the capping layer in the dummy gate structure is damaged or removed , resulting in the process of removing the dummy gate 23 in subsequent process steps, the capping layer cannot play a sufficient protective role, so that the high-K gate dielectric layer 21 and the semiconductor substrate 10 are damaged, affecting the performance of the formed transistor, thereby affecting The performance of the formed semiconductor device

[0010] The performance of the semiconductor structure formed by the existing technology needs to be further improved

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