Adaptive adjustment method and device for I2S peripheral circuit timing sequence
A technology of self-adaptive adjustment and peripheral circuits, which is used in electrical digital data processing, instruments, etc., to achieve the effects of high adjustment accuracy, reduced design difficulty, and improved robustness
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[0065] Such as figure 2 As shown, the adaptive adjustment method of I2S peripheral circuit timing of the present invention comprises the following steps:
[0066] (1) Adaptive training of the PCB board before the first normal working mode, first control the test mode signal to be set to be valid;
[0067] (2) The test stimulus data is strobed and sent out according to the transmission clock frequency of the pre-stored data sequence, and sent to the data pin port of the main control chip after being delayed by two-stage registers. Then it is transmitted to the data pin of the I2S device through the PCB wire feet; at the same time
[0068] The I2S data transmission clock is output to the clock pin port of the main control chip after phase delay and register delay in sequence, and then transmitted to the clock pin pin of the I2S device through the PCB wire;
[0069] (3) by controlling the phase delay and the register delay, until the internal phase delay configuration of the c...
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