Supercharge Your Innovation With Domain-Expert AI Agents!

A zero-bias testing method for an accelerometer signal processing circuit

A technology of signal processing circuit and accelerometer, which is applied in the direction of speed/acceleration/shock measurement, speed/acceleration/shock measurement equipment testing/calibration, measuring device, etc. It can solve the problem of low test efficiency and improve test efficiency. The effect of reducing test time

Active Publication Date: 2018-11-16
SUZHOU R&D CENT OF NO 214 RES INST OF CHINA NORTH IND GRP
View PDF9 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It takes 7 hours to test a circuit just for data collection and temperature maintenance, plus the heating and cooling time, one indicator of a circuit needs to be tested for one day, and the test efficiency is too low

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A zero-bias testing method for an accelerometer signal processing circuit
  • A zero-bias testing method for an accelerometer signal processing circuit
  • A zero-bias testing method for an accelerometer signal processing circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0023] Zero-bias stability test method for monolithic circuits:

[0024] Using the combination of a single-chip dedicated test bench and the NI-USB-6281 interface board, the relevant parameters of the circuit can be set and adjusted through a PC, so that the corresponding output terminals of the circuit will change. The NI-USB-6281 interface board and the circuit are connected through the SPI interface, and the circuit EEPROM is erased, read and written by the special software in the PC. Test principle according to figure 1 shown.

[0025] Use the special test software developed by LABVIEW to control the NI-USB-6281 interface board on the PC, and operate the EEPROM of the circuit through the SPI interface. Use a voltmeter to monitor the open-loop output voltage VOUT_OL, and adjust the parameters TrimCap1 and TrimCap2 through Address 000 in the software to make the VOUT_OL value 2.5±0.01V.

[0026] Using the virtual instrument as the platform, use the NI-USB-6281 high-speed ...

Embodiment 2

[0028] Zero-bias stability test method for multi-chip circuits:

[0029] The current test software is partly processed by a single chip based on MATLAB, which requires 8 times of modification of the MATLAB program to process the 8 accelerometer signal processing circuits. The test process is complicated, and the previous transformation has little effect. In order to improve the test efficiency, the processing program of the zero bias stability of the accelerometer signal processing circuit is packaged into an operation interface for testers. As long as the zero bias data storage address of the previous 8 bias accelerometer circuit stability test is correctly entered, the 8 bias data can be automatically obtained. Bias stability index of chip gyroscope.

[0030] Using the combination of multi-chip special test bench and NI-USB-6281 interface board, the relevant parameters of the accelerometer signal processing circuit can be set and adjusted through the PC to change the corresp...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an accelerometer signal processing circuit zero offset test method. According to the method, an NI-USB-6281 interface board is connected with a to-be-test accelerometer signal processing circuit on a test stand through an SPI interface, the NI-USB-6281 interface board and the SPI interface are controlled through LABVIEW test software on a PC, parameters of the to-be-test accelerometer signal processing circuit are set, removal, reading or write-in operation on an EEPROM of the to-be-test accelerometer signal processing circuit is carried out to make an output end of the to-be-test accelerometer signal processing circuit change, and a zero offset stability value is acquired through utilizing an acquired output voltage of the to-be-test accelerometer signal processing circuit and MATLAB software on the PC on the basis of an Allen variance method. The method is advantaged in that the test time is effectively reduced, and test efficiency is improved.

Description

technical field [0001] The invention belongs to the field of testing in semiconductor integrated circuits, in particular to a zero-bias testing method for an accelerometer signal processing circuit. Background technique [0002] At present, the test device of the open-loop accelerometer signal processing circuit (referred to as "accelerometer circuit") can test all parameters, but since a test device can only test one circuit at a time, when testing some indicators of multiple temperature points ,low efficiency. [0003] For example, the indicator of zero bias stability needs to test 5 temperature points, and each temperature point needs to collect data for one hour. In addition to the time for heating and cooling, each temperature change also requires a temperature holding time of half an hour each time. It takes 7 hours to test a circuit just for data collection and temperature maintenance, plus the time for heating up and cooling down. One indicator of a circuit needs to...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G01P21/00
CPCG01P21/00
Inventor 王丽张紫乾
Owner SUZHOU R&D CENT OF NO 214 RES INST OF CHINA NORTH IND GRP
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More