Preparation method for epitaxial wafer of GaN-based light emitting diode

A technology of light-emitting diodes and epitaxial wafers, which is applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve problems such as lattice mismatch, lattice defects, and affecting LED photoelectric performance, and achieve the effect of improving photoelectric performance and growth quality

Active Publication Date: 2016-10-26

HC SEMITEK SUZHOU

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AI-Extracted Technical Summary

Problems solved by technology

[0005] There is a lattice mismatch between the sapphire substrate and GaN, and a large number of lattice defects will be introduced during the ep...

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Method used

[0068] In the embodiment of the present invention, the stress release layer includes a multi-layer stress release sublayer formed by sequentially laminating the first sublayer, the second sublayer, the third sublayer, and the fourth sublayer. The first sublayer is an AlGaN layer , the third sublayer is an InGaN layer, the second sublayer and the fourth sublayer are both GaN layers, the growth temperature of the first sublayer is higher than that of the third sublayer, the stress release layer is a periodic structure and the InGaN layer The lower growth temperature is conducive to the good growth ...

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Abstract

The invention discloses a preparation method for an epitaxial wafer of a GaN-based light emitting diode, and belongs to the technical field of a semiconductor. The preparation method comprises the steps of laminating a buffer layer, a non-doped GaN layer, an N type layer, a stress release layer, a multi-quantum well layer and a P type layer on a sapphire substrate in sequence, wherein the stress release layer comprises multiple stress release sub-layers, the stress release sub-layers comprise a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are laminated in sequence, the first sub-layer is an AIGaN layer, the third sub-layer is an InGaN layer, the second and fourth sub-layers are GaN layers, and the growth temperature of the first sub-layer is higher than that of the third sub-layer. According to the method, a periodic structure is employed in the stress release layer, the relatively low growth temperature is employed in the InGaN layer, thereby facilitating good growth of lattices, the stress generated between the sapphire substrate and the GaN layers due to lattice mismatch can be released, the growth quality of the multi-quantum well layer is improved, and the photoelectric property of the LED is improved.

Application Domain

Semiconductor devices

Technology Topic

Lattice mismatchMultiple stress +8

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Examples

Experimental program(1)

Example Embodiment

[0025] Example

[0026] The embodiment of the present invention provides a method for preparing an epitaxial wafer of a GaN-based light-emitting diode, see figure 1 , The preparation method includes:

[0027] Step 100: Clean the surface of the sapphire substrate.

[0028] Specifically, this step 100 may include:

[0029] The sapphire substrate is heated to 1110°C in a Metal-organic Chemical VaporDeposition (MOCVD) reaction chamber. 2 ) Annealing the sapphire substrate in an atmosphere for 8-10 minutes.

[0030] In practical applications, a Si substrate or a SiC substrate can also be used to replace the sapphire substrate.

[0031] Step 101: Growing a buffer layer on a sapphire substrate.

[0032] Specifically, this step 101 may include:

[0033] The growth temperature was controlled to 540°C, and a GaN buffer layer with a thickness of 30 nm was grown on the sapphire substrate.

[0034] Step 102: Growing an undoped GaN layer on the buffer layer.

[0035] Specifically, this step 102 may include:

[0036] The growth temperature is controlled at 1100°C, and a non-doped GaN layer with a thickness of 0.5 μm is grown on the buffer layer.

[0037] Step 103: Growing an N-type layer on the undoped GaN layer.

[0038] Specifically, the N-type layer may be a GaN layer.

[0039] Specifically, this step 103 may include:

[0040] The growth temperature is controlled at 1050-1100° C., and a Si-doped GaN layer with a thickness of 1 μm is grown on the undoped GaN layer.

[0041] In this embodiment, the doping concentration of the N-type layer is greater than 10 19 cm -3 , And less than or equal to 9×10 19 cm -3.

[0042] In practical applications, the N-type layer can also be doped with other materials, such as Ge.

[0043] Step 104: Growing a stress relief layer on the N-type layer.

[0044] In this embodiment, the stress relief layer includes a plurality of stress relief sublayers. The stress relief sublayer includes a first sublayer, a second sublayer, a third sublayer, and a fourth sublayer stacked in sequence. The first sublayer is The AlGaN layer, the third sublayer is an InGaN layer, the second sublayer and the fourth sublayer are both GaN layers, and the growth temperature of the first sublayer is higher than the growth temperature of the third sublayer.

[0045] In a specific implementation, the stress relief layer is directly grown on the N-type layer.

[0046] Optionally, the growth temperature of the first sublayer>the growth temperature of the second sublayer>the growth temperature of the third sublayer, the growth temperature of the third sublayer≤the growth temperature of the fourth sublayer

[0047] Preferably, the growth temperature of the four sublayers of the stress relief sublayer may be different from each other.

[0048] Optionally, the number of layers of the stress relief sub-layer may be 2-20 layers.

[0049] Optionally, the thickness of the four sublayers of the stress relief sublayer may be the same or different.

[0050] Optionally, the second sublayer may be an undoped GaN layer or an N-type doped GaN layer, and the doping concentration of the N-type doped GaN layer is lower than that of the N-type layer.

[0051] Optionally, the fourth sub-layer may be an undoped GaN layer or an N-type doped GaN layer, and the doping concentration of the N-type doped GaN layer is lower than that of the N-type layer.

[0052] Preferably, the N-type doped GaN layer may be doped with silicon (Si) or doped with germanium (Ge).

[0053] In practical applications, if the GaN layer is doped with impurity elements, the antistatic ability can be improved, and the reverse working voltage will also be affected. When the doping concentration of the GaN layer is too high, the antistatic ability will be reduced, and the reverse The operating voltage will be further reduced, so the specific growth conditions can be combined to determine whether the GaN layer is doped and the doping concentration.

[0054] Preferably, the doping concentration of the N-type doped GaN layer may be 10 17 ~10 19 cm -3.

[0055] For example, the stress release layer includes 6 stress release sublayers, the growth temperature of the first sublayer is 1000°C, the growth temperature of the second sublayer is 900°C, the growth temperature of the third sublayer is 800°C, and the growth temperature of the fourth sublayer The growth temperature is 900°C. The molar content of Al in the first sublayer is 0.15, the molar content of In in the third sublayer is 0.1, and the thicknesses of the first, second, third, and fourth sublayers are all 10nm, and The first sublayer, the second sublayer, the third sublayer, and the fourth sublayer are all undoped.

[0056] For another example, the stress release layer includes 4 stress release sublayers. The growth temperature of the first sublayer is 1000°C, the growth temperature of the second sublayer is 900°C, the growth temperature of the third sublayer is 800°C, and the growth temperature of the fourth sublayer is 800°C. The growth temperature of the layer is 900°C. The molar content of Al in the first sublayer is 0.15, the molar content of In in the third sublayer is 0.15, the thickness of the first, second, third, and fourth sublayers are all 10nm, and The first sublayer and the third sublayer are both N-type doped GaN layers, and the doping concentration of the N-type doped GaN layer is 1.8*10 18 cm -3.

[0057] Step 105: Growing a multiple quantum well layer on the stress relief layer.

[0058] In this embodiment, the multiple quantum well layer includes alternately stacked quantum well layers and quantum barrier layers. The quantum well layer is In x Ga 1-x N layer, 0

[0059] For example, the multiple quantum well layer includes 12 quantum well layers and 12 quantum barrier layers stacked alternately. The thickness of the quantum well layer is 3 nm, and InGaN is used as the growth material, and the growth temperature is 800°C; the thickness of the quantum barrier layer is 11 nm, and GaN is used as the growth material, and the growth temperature is 930°C.

[0060] Optionally, the multiple quantum well layer and the stress relief layer may be attached to each other. Specifically, the multiple quantum well layer and the GaN layer in the stress release layer are attached to each other, that is, the multiple quantum well layer is directly grown on the GaN layer. Since the composition of the GaN layer is relatively simple and the growth quality is higher, the multiple quantum well layer grown on this basis will have better crystal quality than the multiple quantum well layer grown on the InGaN layer, and the internal quantum efficiency of the multiple quantum well layer Also higher.

[0061] Step 106: Growing a P-type layer on the multiple quantum well layer.

[0062] Specifically, this step 106 may include:

[0063] Grow a P-type layer with a thickness of 200nm on the multiple quantum well layer,

[0064] Optionally, the P-type layer may include a P-type AlGaN electron blocking layer, a P-type GaN layer, and a P-type contact layer that are sequentially stacked.

[0065] Optionally, the P-type layer may be doped with Mg.

[0066] In specific implementation, high purity H can be used 2 Or N 2 As carrier gas, use TEGa or TMGa, TMAl, TMIn and NH 3 Used as Ga source, Al source, In source and N source respectively, and can use SiH 4 And Cp 2 Mg is used as N-type and P-type dopants, and TeESi (tetraethyl silicon) and Si can also be used 2 H 6 As the Si source, metal organic chemical vapor deposition equipment or other equipment can be used to complete the growth of the epitaxial wafer.

[0067] figure 2 This is a schematic diagram of the structure of the epitaxial wafer of the light emitting diode fabricated in this embodiment, where 10 is a sapphire substrate, 20 is a buffer layer, 30 is an undoped GaN layer, 40 is an N-type layer, 50 is a stress release layer, and 51 is Stress release sublayer, 51a is the first sublayer, 51b is the second sublayer, 51c is the third sublayer, 51d is the fourth sublayer, 60 is the multiple quantum well layer, 61 is the quantum well layer, and 62 is the quantum barrier Layer, 70 is a P-type layer.

[0068] In the embodiment of the present invention, the stress release layer includes multiple stress release sublayers formed by sequentially stacking a first sublayer, a second sublayer, a third sublayer, and a fourth sublayer. The first sublayer is an AlGaN layer, and the third The sub-layer is an InGaN layer, the second sub-layer and the fourth sub-layer are both GaN layers, the growth temperature of the first sub-layer is higher than the growth temperature of the third sub-layer, the stress relief layer is a periodic structure and the InGaN layer uses a lower The growth temperature is conducive to the good growth of the crystal lattice, releases the stress caused by the lattice mismatch between the sapphire substrate and GaN, improves the growth quality of the multiple quantum well layer, and improves the photoelectric performance of the LED. At the same time, the AlGaN layer adopts a higher growth temperature, which is conducive to the incorporation of Al components, thereby increasing the barrier height, conducive to the lateral expansion of current, reducing the forward voltage of the LED, further improving the photoelectric performance of the LED, and extending the LED Service life.

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PUM

Property	Measurement	Unit
Doping concentration	3.0 ~ 1019.0	cm
tensile		MPa
Particle size		Pa
strength	10

Description & Claims & Application Information

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Classification and recommendation of technical efficacy words

Improve growth quality
Improve photoelectric performance

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Quantum well Quantum Semiconductor Sapphire substrate Semiconductor technology Light-emitting diode

Preparation method for epitaxial wafer of GaN-based light emitting diode

AI-Extracted Technical Summary

Problems solved by technology

Method used

Abstract

Image

Examples

Example Embodiment

PUM

Description & Claims & Application Information

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