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72results about How to "Increase growth temperature" patented technology

Method for cultivating peonies for oil

ActiveCN103621277AIncrease growth temperatureIncrease the probability of successful pollinationHorticulture methodsPlastic bagIndoor air
The invention relates to the technical field of flower cultivation, in particular to a method for cultivating peonies for oil. The method comprises the steps that sandy soil is laid in a greenhouse, pH is adjusted, and fertilization and sterilization are carried out; selected peony plants for the oil are planted with row spacing*line spacing of 30cm*50cm; hoeing and topdressing are carried out in the growing period of the peonies for the oil, indoor air ventilation and light transmission are kept, insect killing and sterilization are carried out, chlormequat chloride is sprayed, the flower head of each plant is covered with a plastic bag for 2-3 days, and then a plurality of small holes are pricked in each plastic bag with needles; in the florescence, the plastic bags on the flower heads of the plants are removed, gibberellins and daminozide are sprayed on pistils and stamens respectively, pollinating insects are placed in the greenhouse, temperature, illumination time and ventilation time in the greenhouse are controlled, and meanwhile hand pollination is carried out; fallen leaves are swept away in time, and are burned up or buried deeply in a centralized mode. According to the method, the growing conditions of the peonies for the oil are improved, meanwhile, the pollination success rate in the florescence of the peonies for the oil is increased, and therefore the seed setting rate is improved.
Owner:BEIJING FORESTRY UNIV FOREST SCI CO LTD +1

Epitaxial wafer of light-emitting diode and growth method thereof

The invention discloses an epitaxial wafer of a light-emitting diode and a growth method thereof, and belongs to the technical field of semiconductors. The epitaxial wafer comprises a substrate, and a buffer layer, a non-doped GaN layer, an N-type GaN layer, a light-emitting layer and a P-type GaN layer which are laminated on the substrate in turn. Mg is doped in the buffer layer. According to the epitaxial wafer, Mg is doped in the buffer layer, Mg can induce the material of the buffer layer to three-dimensional growth from two-dimensional growth to form three-dimensional island crystal grains with no requirement for the growth mode of low temperature and low pressure of the buffer layer, and the growth temperature of the buffer layer can be increased so that edge dislocation, screw dislocation and other lattice defects can be reduced, the crystal quality of the epitaxial wafer can be enhanced and the internal quantum efficiency and the anti-static capacity of the LED can be enhanced. Besides, the non-doped GaN layer is arranged between the buffer layer and the N-type GaN layer, and the non-doped GaN layer has the effect of separation so as to avoid the influence of the doped Mg in the buffer layer on electron injection light-emitting layer composite luminescence of the N-type GaN layer.
Owner:HC SEMITEK ZHEJIANG CO LTD

AlN single crystal substrate production apparatus and application method thereof

The invention provides an AlN single crystal substrate production apparatus and an application method thereof. The main body of the AlN single crystal substrate production apparatus is a high temperature resistant crucible and the crucible is divided into two parts, namely a crystal growth chamber and a raw material chamber. A gas pipe of ammonia gas or nitrogen gas or mixed ammonia gas and nitrogen gas is arranged on the sidewall of the crystal growth chamber, and a gas outlet is formed in a position opposite to the gas pipe; a substrate is fixed on the top of the reaction chamber; a carrier gas pipe is arranged at the bottom of the raw material chamber; raw materials are placed at the bottom of the raw material chamber; and the growth chamber is separated from the raw material chamber by a perforated separator. The crucible can be heated by heaters around the crucible, or directly heated by use of the crucible. According to the AlN single crystal substrate production apparatus, a large-size cheap sapphire substrate is taken as seed crystal for AlN crystal growth and the problem of expensive seed crystal of the PVT apparatus is solved; and besides, compared with halide vapor phase epitaxy (HVPE) equipment, the growth temperature of the AlN single crystal substrate production apparatus is higher and closer to the balance growth temperature of the AlN crystal, and therefore, the grown crystal is higher in quality.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI

Preparation method of ultraviolet LED and ultraviolet LED

The invention provides a preparation method of an ultraviolet LED and the ultraviolet LED. The preparation method comprises the following steps: introducing a metal source and a V-group reactant on a substrate, and decomposing to form a buffer layer under high temperature; increasing growth temperature, growing a non-doped AltGa1-tN layer and growing an N-type AluGa1-uN layer on the basis of the AltGa1-tN layer; adjusting the temperature to be a temperature for growing quantum wells, and growing an AlxGa1-xN/AlyGa1-yN multi-quantum well structure; growing an AlzGa1-zN electron barrier layer with the thickness of 5 to 100 nm on the grown AlxGa1-xN/AlyGa1-yN multi-quantum well structure; growing a P-type layer with high hole concentration and low ultraviolet absorption rate on the basis of the AlzGa1-zN electron barrier layer, wherein the P-type layer is an AlvGa1-vN/GaN superlattice structure, a P-type GaN layer with high dosage concentration is on the P-type layer to form a P-type ohmic contact layer. Through the embodiment of the invention, the absorption of the P-type layer for ultraviolet light emitted by the quantum wells can be effectively reduced, the luminous efficiency of the ultraviolet LED is improved, and the service life of the ultraviolet LED device can be prolonged.
Owner:EPITOP PHOTOELECTRIC TECH

GaN-based light emitting diode epitaxial wafer and manufacturing method therefor

The invention discloses a GaN-based light emitting diode epitaxial wafer and a manufacturing method therefor and belongs to the field of light emitting diodes. The GaN-based light emitting diode epitaxial wafer comprises a substrate, a buffer layer, a three-dimensional growth layer, a u-GaN layer, an n type layer, an n type current expansion layer, a stress releasing layer, a multiple quantum well layer and a p type layer; wherein the buffer layer, the three-dimensional growth layer, the u-GaN layer, the n type layer, the n type current expansion layer, the stress releasing layer, the multiple quantum well layer and the p type layer orderly arranged on the substrate in a covering manner; the n type current expansion layer comprises a first sub-layer covering the n type layer and a second sub-layer covering the first sub-layer; the first sub-layer is an AlGaN layer, the second sub-layer is of a superlattice structure formed by a non-Si-doped GaN layer and an Si-doped GaN layer, the first sub-layer is higher than the n type layer and the second sub-layer in terms of growth temperature, and the second sub-layer is greater than the first sub-layer in terms of growth pressure. The GaN-based light emitting diode epitaxial wafer is capable of overcoming defects and improving photoelectric performance.
Owner:HC SEMITEK ZHEJIANG CO LTD

Preparation method of epitaxial wafer for 8-inch high-power IGBT component

The invention discloses a preparation method of an epitaxial wafer for an 8-inch high-power IGBT component. The method includes following steps: preparing a substrate: selecting an 8-inch substrate with a p-doped middle resistance, wherein the resistivity is 3-25 ohm*cm, and a back-sealing structure is in a polycrystalline (Poly) back-sealing mode; HCl polishing: selecting the HCl flow of 1-2 L/min at the temperature lower than 1080 DEG C with the polishing time of 2 minutes, and performing purging with high-flow H2 for 3 minutes after completion of polishing; and epitaxial growth: selecting at least three layers of epitaxial process conditions, wherein a silicon source employs ultra-high-purity trichlorosilane, the epitaxial growth of each layer employs the same growth temperature and growth rate, an epitaxial layer with flat resistivity is grown on a first layer, an intermediate transition layer is grown on an intermediate layer through introduction of a doping source with a variabledoping flow, and a high-resistance epitaxial layer is grown on a final layer. According to the method, the growth of the epitaxial layer of each layer employs the same growth rate and growth temperature so that the controllability of epitaxial parameters of products in a batch production process is facilitated.
Owner:NANJING GUOSHENG ELECTRONICS

Semiconductor heterostructure, and preparation method and applications thereof

The invention discloses a semiconductor heterostructure, and a preparation method and applications thereof. The semiconductor heterostructure comprises a first semiconductor material and a second semiconductor material. The first semiconductor material and the second semiconductor material are mutually joined to form virtual lattice matching. The first semiconductor material is AlxInyGa1-x-yN, wherein 4.72< / =x / y< / =5.10, 0< / =x< / =1 and 0<y<1. The second semiconductor material is GaN. Preferably, 0.2<(1-x-y)< / =0.6. The preparation method comprises steps: after a GaN layer is formed through growth, an AlxInyGa1-x-yN layer is formed in a mode of introducing an aluminum source, an indium source, a gallium source and a nitrogen source in a reaction chamber of epitaxial growth equipment in a simultaneous and / or pulse means. By using the semiconductor heterostructure of the invention, the production process of a semiconductor device can be effectively simplified, the reliability of the semiconductor device is optimized, and particularly, the reliability problem of devices such as an HEMT due to stress can be eliminated fundamentally, and more ideal spontaneous polarization strength between the barrier layer and the GaN layer can be kept.
Owner:SUZHOU INST OF NANO TECH & NANO BIONICS CHINESE ACEDEMY OF SCI

Method for growing bismuth selenide high-index surface single crystal thin film on silicon (211) substrate

The invention discloses a method for growing a bismuth selenide high-index surface single crystal thin film on a silicon (211) substrate. The method comprises the following steps: 1), performing flashing silicon treatment or chemical etching treatment on a Si substrate having a crystal plane orientation of (211); 2), raising the temperature of a Bi beam source, depositing and growing a Bi buffer layer on the Si (211) substrate prepared in the step 1); 3), after the Bi buffer layer is grown in the step 2), adjusting the temperature of the Bi beam source, raising the temperature of a Se crackingbeam source, and starting to grow a Bi2Se3 nucleation layer; 4): after the growth of the Bi2Se3 nucleation layer is completed in the step 3, continuing to grow a Bi2Se3 high-index surface single crystal epitaxial thin film to obtain the bismuth selenide high-index surface single crystal thin film. According to the method, the Bi ultra-thin single crystal layer is adopted as a buffer layer, the low-temperature Bi2Se3 nucleation layer with a thickness of 3-5 nm is grown on the surface of the Bi buffer layer, then the growth temperature is appropriately increased to grow the Bi2Se3 high-index surface single crystal thin film epitaxial layer, and the Bi2Se3 high-index surface single crystal thin film having a relatively good crystallinity can be obtained.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Preparation method of small-tube-diameter carbon nanotubes

The invention belongs to the technical field of novel material and relates to a preparation method of small-tube-diameter carbon nanotubes. The method includes generating an iron-containing metal-organic framework compound from iron ions and an organic ligand through a solvothermal process; after separation, washing and drying, soaking the compound in a solution containing rare earth ions and thenperforming carbonization in an inert gas to obtain a porous carbon material loaded with iron; and ejecting the porous carbon material, as a solid carbon source and a catalyst, from a plasma torch byadopting a high-temperature plasma process to gasify the carbon source and catalyst through high temperature so that carbon nanotubes grow during following downstream cooling. The porous carbon material derived from the metal-organic framework compound can enable ultrafine particle uniform distribution of original iron element and the porous carbon facilitates high-temperature gasification, thus providing an ultrafine nanometer catalyst and highly active carbon source for growth of ultrafine carbon nanotubes, and greatly increasing the growth efficiency of the small-tube-diameter carbon nanotubes. The method is an effective means for preparing the small-tube-diameter carbon nanotubes and single-walled carbon nanotubes, and has important practical application value.
Owner:JIANGXI COPPER TECHNOLOGY RESEARCH INSTITUTE CO LTD

(In, Mn) As nano-wires and preparation method thereof

The invention discloses (In, Mn) As nano-wires and a preparation method thereof. According to the present invention, the nano-wires are aligned along the crystal orientation, the epitaxy of the nano-wires grows on the substrate of the GaAs (001) single crystal, and the nano-wires transversely lie on the surface of the GaAs (001) single crystal; In(1-x)MnxAs (0.3<=x<=0.5) is the nano-wires, the sphalerite structure of the GaAs (001) single crystal is maintained, and the In(1-x)MnxAs is spontaneously aligned along the crystal orientation, such that the In(1-x)MnxAs has the magnetic anisotropy along the orientation, wherein the epitaxy of the In(1-x)MnxAs grows, and the In(1-x)MnxAs transversely lies on the surface of the GaAs (001) single crystal; according to the preparation method for the (In, Mn) As nano-wires, a molecular beam epitaxy technology and equipment are adopted, the GaAs (001) single crystal is adopted as the substrate, the Mn content in the elements of In and Mn is increased to 30-50%, and an intermittent growth way is adopted, such that the (In, Mn) As nano-wires are obtained, wherein the epitaxy of the In(1-x)MnxAs grows, and the nano-wires transversely lie on the surface of the GaAs (001) single crystal, and have the uniaxial anisotropy.
Owner:WUXI NANLIGONG TECH DEV

Method for growing silicon carbide crystals by PVT method and device thereof

The invention provides a method for growing silicon carbide crystals by a PVT method and a device thereof. The method comprises the following steps: (1) an assembling stage; (2) a heating stage: placing the assembled crucible in a furnace body, heating the crucible, and controlling the temperature difference between the temperature of the center of the top end of the crucible and the temperature of the edge of the top end of the crucible to be delta T1; and (3) a crystal growth stage: keeping the temperature of the center of the top end of the crucible unchanged, controlling the thermal insulation cover to move upwards along the side wall of the thermal insulation cylinder, and controlling the temperature difference between the temperature of the center of the top end of the crucible and the temperature of the edge of the top end of the crucible to be reduced to T2, so that the silicon carbide raw material is conveyed to the seed crystal for crystal growth in a gas phase manner. By controlling the heat preservation cover to move upwards, the annular temperature field is more uniform and stable, and the radial temperature gradient is gradually and slowly reduced to delta T2, so that directional quantitative adjustment of the radial temperature gradient is realized, the radial temperature gradient at the seed crystal is gradually reduced, the difference between the minimum thickness of the center and the minimum thickness of the edge of the silicon carbide crystal is reduced, and the effective utilization rate of the silicon carbide crystal with the same weight is increased.
Owner:SICC CO LTD

Type-II superlattice structure based on indium arsenide and preparation method

The invention discloses a type-II superlattice structure based on indium arsenide and a preparation method. The type-II superlattice structure based on indium arsenide comprises an InAs layer, a GaAs layer, a GaAsxSb1-xlayer and a GaAs layer from bottom to top, and is characterized in that: (1) an original GaSb substrate is replaced with an InAs substrate, so that the growth temperature of superlattices is substantially increased, and the increasement of the growth temperature is conductive to increasing a diffusion length of surface atoms, thereby being more conductive to the two-dimensional growth of materials and the reduction of material defect density; (2) an As valve is always in an open state during the whole growth process of type-II superlattices, so that a GaAsSb ternary compound is formed due to the outflow of partial As when growing a GaSb layer, growth temperature of the layers tends to be uniform due to the existence of the common element As in the layers, and the counterdiffusion at interfaces is reduced; (3) variation of thickness of the InAs layer has small influence on mismatching of the InAs-based type-II superlattices, the growth difficulty of long waves materials, particularly extremely-long-wave materials, is extremely reduced, and the performance and quality of the materials can be more easily improved.
Owner:SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI

Method for preparing gallium-nitride-based photoelectric detector based on graphene insertion layer structure

The invention discloses a method for preparing a gallium-nitride-based photoelectric detector based on a graphene insertion layer. The method is mainly used for solving the problems that in the priorart, a nitride material epitaxially grown on a copper substrate is poor in quality and is not provided with a transition layer. The method comprises the preparation steps that a magnetron sputtering aluminum nitride thin film is arranged on an alpha-surface sapphire substrate; graphene is transferred to the magnetron sputtering aluminum nitride thin film, and a sapphire substrate covered with thegraphene is obtained and heated; a pulsed aluminum nitride transition layer is grown on the heated sapphire substrate; a low-temperature gallium nitride layer is grown on the transition layer to obtain a gallium nitride substrate; and a window graph is photoetched on the gallium nitride substrate, and an electrode is manufactured. Magnetron sputtering aluminum nitride and the pulsed aluminum nitride transition layer are adopted, the graphene serves as the insertion layer, thus gallium nitride can grow on the substrate with the large lattice mismatch constant, the quality of the gallium-nitride-based photoelectric detector is improved, and the method can be used for manufacturing gallium-nitride-based photoelectric devices.
Owner:XIDIAN UNIV
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