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Process for manufacturing semiconductor package having hollow chamber

A manufacturing process, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problem of inability to reduce the size of the packaging device, limit the size of the cavity space, and it is difficult to change the composition of the solder paste Ratio

Inactive Publication Date: 2016-11-09
CHIPBOND TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In the prior art, the general method of bonding the cover to the substrate is to apply solder paste to the connecting portion of the substrate by screen printing, and then thermally press the cover to the substrate to form a They are connected to each other, but because the screen printing is to form the solder paste on the connection part of the substrate through the mesh of the screen, when the cavity is formed on the substrate, the connection part of the substrate needs to leave a large space. The width of the screen printing is used for the coating of solder paste, so the space of the cavity in the substrate is limited, and the size of the packaging device cannot be reduced
In addition, the viscosity and fluidity of the solder paste must be considered in the method of screen printing, so that the solder paste can be printed on the connection part of the substrate smoothly, and it is difficult to change the composition ratio of the solder paste according to the demand

Method used

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  • Process for manufacturing semiconductor package having hollow chamber
  • Process for manufacturing semiconductor package having hollow chamber
  • Process for manufacturing semiconductor package having hollow chamber

Examples

Experimental program
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no. 1 example

[0042] see figure 1 , is a first embodiment of the present invention, a flow chart of a semiconductor package manufacturing process 10 with a hollow chamber, the semiconductor package manufacturing process 10 with a hollow chamber includes "providing the lower substrate 11", "forming the first ball The steps of the lower metal layer on the surface of the ring wall 12", "reflowing the solder balls 13", "coating flux 14" and "connecting the upper substrate and the lower substrate 15".

[0043] see figure 1 , figure 2 and Figure 5 , providing a lower substrate 100 in step 11, the lower substrate 100 may be selected from silicon, ceramics, glass, metal, polymer materials or other semiconductor materials, the lower substrate 100 has a bottom plate 110, a ring wall 120 and a groove 130, The ring wall 120 is formed on the base plate 110, and the ring wall 120 and the base plate 110 form the groove 130, the ring wall 120 has a surface 121 and a plurality of corners 122, the surfa...

no. 2 example

[0050] see Figure 9 , is a second embodiment of the present invention, a side sectional view of a semiconductor package manufacturing process 10 with a hollow chamber, the difference from the first embodiment is that the upper substrate 500 has a protrusion 530, and the connection surface 510 is The surface of the protruding portion 530, so that after the upper substrate 500 and the lower substrate 100 are bonded, the height of the hollow chamber C can be higher, and can be used to accommodate objects with a higher height or requiring vertical movement. The electronic component E.

[0051] In the present invention, the bonding layer 400 formed by reflowing the solder balls 300 connects the lower substrate 100 and the upper substrate 500 to form a sealed hollow chamber C for accommodating the electronic component E. Due to the solder balls The diameter D of 300 can reach the order of microns, so the width W of the surrounding wall 120 of the lower substrate 100 can be effecti...

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Abstract

The invention relates to a process for manufacturing a semiconductor package having a hollow chamber. The process includes providing a bottom substrate which has a bottom plate, a ring wall and a lot, the ring wall and the bottom plate forming the lot, forming under ball metallurgy layer, arranging a plurality of solder balls at the surface of the under ball metallurgy layer, each of the solder balls comprising a diameter, wherein a spacing is spaced apart between two adjacent solder balls; performing reflow soldering on the solder balls for making the solder balls melting and interconnecting to form a connection layer, connecting a top substrate to the bottom substrate, wherein the lot of the bottom substrate is sealed by the top substrate to form a hollow chamber used for accommodating an electronic device.

Description

technical field [0001] The present invention relates to a semiconductor packaging manufacturing process, in particular to a semiconductor packaging manufacturing process with a hollow chamber. Background technique [0002] A MEMS (Microelectromechanical Systems) packaging manufacturing process is to form a cavity (Cavity) inside the substrate (which can be a silicon substrate or other semiconductor materials) by wet etching, dry etching or electrical discharge machining, and then The electronic components to be packaged (such as resistors, transistors, radio frequency devices, integrated circuits or capacitors) are installed in the cavity, and finally the cover is covered to complete the package. MEMS packaging devices are often used in consumer electronics products (such as smart phones or laptops), and the size of the packaging device is relatively demanding. Therefore, how to reduce the size of the packaging device is an important issue in the MEMS packaging manufacturing...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/56H01L23/053H01L23/31
CPCH01L21/561B81C1/00269H01L23/10B81C2203/019H01L21/50
Inventor 施政宏谢永伟林淑真何馥言陈彦廷
Owner CHIPBOND TECH