Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

A Low Trigger Voltage Bidirectional SCR Device Based on Buried Layer Triggering

A low trigger voltage, device technology, applied in the electronic field, can solve the problems of unable to realize ESD protection, SCR can not achieve voltage clamping, etc.

Active Publication Date: 2019-05-10
UNIV OF ELECTRONICS SCI & TECH OF CHINA
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] With the continuous advancement of integrated circuit technology, the gate oxide layer of MOS devices is further thinned, which will cause the gate oxide breakdown voltage B Vox to continue to decrease. The trigger voltage of traditional bidirectional SCR devices that rely on pn junction avalanche breakdown to trigger is much higher. Due to the gate oxide breakdown voltage of the protection circuit, the SCR cannot play the role of voltage clamping and cannot achieve effective ESD protection

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A Low Trigger Voltage Bidirectional SCR Device Based on Buried Layer Triggering
  • A Low Trigger Voltage Bidirectional SCR Device Based on Buried Layer Triggering
  • A Low Trigger Voltage Bidirectional SCR Device Based on Buried Layer Triggering

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0021] This embodiment provides a low-trigger-voltage bidirectional SCR device based on buried-layer triggering. Its structural schematic diagram and equivalent circuit diagram are shown in image 3 As shown, it consists of 1 master device, n trigger devices on the left side of the master device and m trigger devices on the right side of the master device, where n≥1, m≥1;

[0022] The main device has a symmetrical structure, including a p-type silicon substrate 110; an n-type heavily doped buried layer 170 is formed on the silicon substrate 110; n-type wells adjacent to each other from left to right are formed on the buried layer 170 Region 120, p-type well region 130, n-type well region 140, p-type well region 150 and n-type well region 160; n-type well region 120 and n-type well region 160 are respectively provided with n-type heavily doped regions 121, 161; the p-type well region 130 is sequentially provided with a p-type heavily doped region 131, an n-type heavily doped re...

Embodiment 2

[0040] This embodiment provides a low-trigger-voltage bidirectional SCR device based on buried-layer triggering. Its structural schematic diagram and equivalent circuit diagram are shown in Figure 4 As shown, it consists of 1 main device, n trigger devices on the left side of the main device and m trigger devices on the right side of the main device, where n≥1, m≥1; the trigger device structures and devices on both sides of the main device The inter-connection relationship is the same as that of Embodiment 1, and will not be repeated here. The difference is that: the p-type well region 130 of the main device is sequentially provided with a p-type heavily doped region 133, a p-type heavily doped Region 131, n-type heavily doped region 132, p-type heavily doped region 131 and n-type heavily doped region 132 are all connected to PAD1; the p-type well region 150 is provided with n-type heavily doped The impurity region 151 , p-type heavily doped region 152 , p-type heavily doped ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention belongs to the field of electronic technology and provides a low trigger voltage bidirectional SCR device based on buried layer triggering, which is used to reduce the trigger voltage of the bidirectional SCR device. The bidirectional SCR device of the present invention comprises a main device, n and m trigger devices on both sides of the main device, the trigger devices are diode devices, and adjacent trigger devices are connected in series; the main device is in the basic bidirectional SCR structure The first conductivity type well region A and the first conductivity type well region C of the first conductivity type well region are respectively provided with a first conductivity type heavily doped region, and the closed first conductivity type that only plays an isolation role in the basic bidirectional SCR is heavily doped. The doped buried layer is connected in series with external trigger diodes on both sides to form a low-voltage trigger channel of "buried layer + diode string", thereby reducing the trigger voltage of bidirectional SCR devices; at the same time, the trigger voltage can be adjusted by adjusting the number of trigger devices; The invention also effectively improves the opening speed of the device.

Description

technical field [0001] The invention belongs to the field of electronic technology, and relates to the design of an electrostatic discharge (ESD: Electro-Static discharge) protection circuit, in particular to a lateral silicon controlled rectifier SCR (Silicon Controlled Rectifier referred to as SCR). Background technique [0002] Electro-Static Discharge (ESD for short) refers to the current flow between two objects with different electrostatic potential energies. Generally speaking, ESD refers to the rapid current flow. In people's daily life, ESD phenomena can be seen everywhere. For integrated circuits, from production to transportation, system integration and user use, all processes may generate electrostatic discharge on the pins of integrated circuits. The instantaneous large current and high power generated during the ESD process can cause a series of thermal damage to the semiconductor device, which will burn the semiconductor and metal interconnection lines; while...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02
CPCH01L27/0255
Inventor 刘志伟杜飞波刘继芝
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com