Field-programmable gate array chip-based process mapping method

Abstract

The embodiment of the invention provides a field-programmable gate array chip-based process mapping method. According to the method, a structure level circuit can be obtained through logic synthesis processing on a user circuit; the structure level circuit comprises a macroelement; and the macroelement is a function unit which at least comprises an operating logic behavior and a selecting logic behavior. When a field-programmable gate array chip architecture comprises a function module corresponding to the macroelement, the macroelement is mapped to the function module. According to the method, the universality of a process mapping algorithm can be reserved to the maximal extent; and different characteristics of multiple novel FPGA chip architectures can also be quickly supported, so that the time cost and the space (a software memory) cost are reduced; and the maximum work frequency fmax of an overall FPGA chip is improved.

Description

technical field [0001] The present invention relates to the technical field of integrated circuits, in particular to a process mapping method based on a field programmable gate array chip Background technique [0002] Field Programmable Gate Array (Field Programmable Gate Array, FPGA) chip is a logic device with abundant hardware resources, powerful parallel processing capability and flexible reconfigurable capability. These features make FPGA more and more widely used in data processing, communication, network and many other fields. [0003] However, in the process of process mapping of existing FPGA chips, there are always some problems. For example, some FPGA chips lose the ability to customize support for each FPGA chip architecture because they are too general for various algorithms. ; Some FPGA chips are too optimized for the details of the FPGA chip architecture, and when the FPGA chip architecture changes, in order to support the new architecture, it takes a lot of ...

AI Technical Summary

Problems solved by technology

[0003] However, in the process of process mapping of existing FPGA chips, there are always some problems. For example, some FPGA chips lose the ability to customize support for each FPGA chip architecture because they are too general for various algorithms. ; Some FPGA chips are optimized for the details of the FPGA chip architecture, and when the FPGA chip architecture changes, in order to support the new architecture, it takes a lot of time to rewrite the algorithm under the architecture

[0004] It can be seen that the existing process mapping process cannot perform timely and corresponding processing for different FPGA chip architectures, resulting in long time-consuming or inability to complete the mapping process and other problems.

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