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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve problems such as integrated circuit reliability degradation, MOS device gate damage, and integrated circuit application performance degradation

Active Publication Date: 2017-03-29
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In the application of integrated circuits, due to the different application environments, it will be subjected to long-term irradiation or long-term power-on environment or other harsh environments, which will lead to a decrease in the reliability of integrated circuits, and even lead to failure. Most of them are caused by damage to MOS devices, such as damage to the gate of MOS devices, which leads to a decline in the performance of the entire integrated circuit application, and even requires circuit replacement

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0053] In this embodiment, the resistive structure and the gate of the MOS device have the same material and structure, are formed in the same step, and have good compatibility with the gate-last process.

[0054] Step S101, providing a semiconductor substrate, refer to figure 2 shown.

[0055]In the embodiment of the present invention, the semiconductor substrate 200 may be a Si substrate, a Ge substrate, a SiGe substrate, SOI (Silicon On Insulator, Silicon On Insulator) or GOI (Germanium On Insulator, Germanium On Insulator) and the like. In other embodiments, the semiconductor substrate may also be a substrate including other elemental semiconductors or compound semiconductors, such as GaAs, InP or SiC, etc., or a stacked structure, such as Si / SiGe, etc., or other epitaxial Structures, such as SGOI (silicon germanium on insulator), etc.

[0056] In this embodiment, the semiconductor substrate 100 is a silicon substrate.

[0057] Step S102, forming an isolation 102 in th...

Embodiment 2

[0076] In this embodiment, only the parts that are different from the first embodiment are described, and the same parts are regarded as the same as the first embodiment, and will not be described again. In this embodiment, the resistor structure is integrated in a gate-first process.

[0077] In step S201 and step S202, provide semiconductor substrate 200, and form isolation 202 in semiconductor substrate, refer to Figure 9 shown.

[0078] Same as step S101 and step 102 in the first embodiment.

[0079] In step S203, a MOS device is formed on the semiconductor substrate 200, referring to Figure 10 shown.

[0080] In this step, a conventional gate-front manufacturing process can be used to form a MOS device. In this embodiment, specifically, first, gate dielectric material and gate material are deposited, then patterned to form gate dielectric layer 203 and gate 204, and then spacer 206 and source and drain regions 208 are formed , further perform silicide on the source...

Embodiment 3

[0090] In this embodiment, only the parts that are different from the first embodiment are described, and the same parts are regarded as the same as the first embodiment, and will not be described again. In this embodiment, the resistance structure is formed at the same time as the gate is formed in the gate-front process, and the process is simpler and easier.

[0091] Step S301, providing a semiconductor substrate, refer to figure 2 shown.

[0092]In the embodiment of the present invention, the semiconductor substrate 200 may be a Si substrate, a Ge substrate, a SiGe substrate, SOI (Silicon On Insulator, Silicon On Insulator) or GOI (Germanium On Insulator, Germanium On Insulator) and the like. In other embodiments, the semiconductor substrate may also be a substrate including other elemental semiconductors or compound semiconductors, such as GaAs, InP or SiC, etc., or a stacked structure, such as Si / SiGe, etc., or other epitaxial Structures, such as SGOI (silicon germani...

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Abstract

The present invention provides a semiconductor device. The semiconductor device includes a semiconductor substrate, an MOS (metal-oxide-semiconductor) device on the semiconductor substrate, an isolation region in the MOS device, a resistance structure on the isolations region and a dielectric layer which covers the MOS device and the resistance structure. With the device of the present invention adopted, when the MOS device is damaged, especially, the gate of the MOS device is damaged, the MOS device can be heated by energizing the resistance structure, and therefore, charge trapped at interface traps or oxygen vacancies in a gate dielectric can be released, and the damage of the MOS device can be repaired; and H ions contained in film layers such as an interlayer dielectric or gate electrodes can be released to an interface to repair defects.

Description

technical field [0001] The invention relates to the field of semiconductor devices and manufacturing, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] MOS (Metal-Oxide-Semiconductor, Field Effect Transistor) devices form the basic unit of large-scale integrated circuits. With the continuous development of semiconductor technology, the scale, integration and complexity of integrated circuits have also been continuously improved, and have been widely used in various fields. a wide range of applications. [0003] In the application of integrated circuits, due to the different application environments, it will be subjected to long-term irradiation or long-term power-on environment or other harsh environments, which will lead to a decrease in the reliability of integrated circuits, and even lead to failure. Most of them are caused by the damage of the MOS device, such as the damage of the gate of the MOS device, which lead...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/06H01L27/02H01L21/8234
Inventor 许静闫江陈邦明王红丽唐波徐烨锋
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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