Calibration circuit and calibration method applied to input kickback non-linearity of SHA-less analog-to-digital converter
A technology of analog-to-digital converter and digital converter, which is applied in the field of input kickback non-linear calibration circuit, which can solve the problems of taking up time, not suitable for high-speed and high-precision applications, and power consumption of reset phase, so as not to affect the conversion speed effect
Inactive Publication Date: 2017-05-10
SOUTHEAST UNIV
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Problems solved by technology
The traditional method of eliminating kickback nonlinearity is to set a reset phase to reset the last quantized value before sampling, so as to completely eliminate kickback nonlinearity, but this reset phase consumes a certain amount of power consumption and takes up the time of the sampling phase , not suitable for high-speed high-precision applications
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[0031] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.
[0032] An input kickback nonlinear calibration circuit and calibration method applied to an analog-to-digital converter without sampling protection, including a margin amplifier 100, a post-stage analog-to-digital converter 101, a sub-analog-to-digital converter 102, and a nonlinear error estimation module 200 , the calibration module 201, the pseudo-random number generator 103, the sub-digital-to-analog converter 104, the first capacitor Cf, the second to N+2 capacitors (Cs1 to CsN), the first switch Sf1, the second switch Sf2, the third The switch S1p, the fourth switch Spn, the fifth switch Sdac, the sixth switch Sadc, the seventh to N+7th switches (S1 to Sn).
[0033]Wherein: the inverting terminal of the residu...
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The invention discloses a calibration circuit and calibration method applied to the input kickback non-linearity of an SHA-less analog-to-digital converter. The calibration circuit mainly includes an operational amplifier, a post-stage analog-to-digital converter, a pseudo-random number generator, a sub-class analog-to-digital converter, a kickback non-linearity parameter estimation module, and a calibration module. Through the collaborative background work of these modules, the input signal kickback non-linearity error can be calibrated in the digital domain, the circuit structure is simple, the change of the analog circuit is very small, the dynamic performance of the SHA-less analog-to-digital converter is significantly improved, and the signal to noise distortion ratio is improved. The calibration method mainly calibrates the input signal kickback non-linearity error introduced in an SHA-less circuit.
Description
technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a calibration circuit and a calibration method for input kickback nonlinearity applied to an analog-to-digital converter without sampling protection. Background technique [0002] With the rapid development of semiconductor technology, high-speed and high-precision analog-to-digital converters have been widely used in digital communications, military radar and other fields. As one of the mainstream ADC products at present, the pipeline analog-to-digital converter can well take into account the requirements of speed and precision. In the pipeline ADC, the sample-and-hold circuit consumes a lot of power consumption, and at the same time brings a lot of noise and nonlinearity, so the non-sample-hold pipeline ADC gradually becomes the mainstream. [0003] When the pipelined analog-to-digital converter without sampling protection is in the sampling phase, the quantized va...
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IPC IPC(8): H03M1/10H03M1/12
CPCH03M1/1033H03M1/1245
Inventor 吴建辉孙杰王鹏李红
Owner SOUTHEAST UNIV