Production method of three-dimensional ring gating semiconductor field effect transistor

Abstract

The invention provides a production method of a three-dimensional ring gating semiconductor field effect transistor, and belongs to the technical field of three-dimensional micro-nano structures. The method comprises the following steps of providing a substrate, forming an electric insulation layer on the substrate, and forming a functional structure later on the electric insulation layer; forming an active area in the electric insulation layer, and acquiring a self-support functional structure layer in the active area; forming an isolation layer in the other areas except the self-support functional structure layer, and forming a dielectric layer on the self-support functional structure layer and the isolation layer; applying metal material on the surface with the self-support functional structure layer to form a three-dimensional ring gating metal electrode; forming an electrode contact hole in the self-support functional structure layer and/or the three-dimensional ring gating metal electrode by etching; and forming an electrode contact block at the active area and/or the electric insulation layer, and forming a lead between the electrode contact block and the electrode contact hole to communicate the same. The method provided by the invention is less in consumed time, and high in yield, flexibility and designability.

Description

technical field [0001] The invention relates to the technical field of three-dimensional micro-nano devices, in particular to a preparation method of a three-dimensional gate-around semiconductor field effect transistor. Background technique [0002] At present, semiconductor integration technology is still full of challenges, and the demand for high integration and high performance is gradually increasing. As we all know, as the size of semiconductor devices continues to shrink, the method of improving device performance by scaling down the device size is approaching the limit, and the short-channel effect and subthreshold performance degradation also limit the further reduction of the device size. Therefore, more and more researchers use transistors with complex geometrical gate structures and ingenious processes to achieve high integration and high performance of devices. Among all the multi-gate structures proposed so far, the ring-shaped gate has the advantages of high...

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Problems solved by technology

[0003] However, the technology used in the currently reported three-dimensional gate-all-around transistor structure is still based on traditional micro-nano-fabrication semiconductor technology

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