SiGe-based solid-state plasma PiN diode and preparation method thereof
A plasma and diode technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as uneven doping concentration, incompatibility, and low carrier mobility, and achieve enhanced controllability , improved performance, and the effect of high carrier mobility
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Embodiment 1
[0057] See figure 1 , figure 1 It is a flowchart of a method for manufacturing a SiGe-based solid-state plasma PiN diode according to an embodiment of the present invention. The method is suitable for preparing a lateral solid-state plasma PiN diode, and the lateral solid-state plasma PiN diode is mainly used for manufacturing a solid-state plasma antenna. The method comprises the steps of:
[0058] (a) selecting a SiGeOI substrate with a certain crystal orientation, and setting an isolation region on the SiGeOI substrate;
[0059] (b) etching the substrate to form a P-type trench and an N-type trench, the depth of the P-type trench and the N-type trench being less than the thickness of the top layer SiGe of the substrate;
[0060] (c) forming a first P-type active region and a first N-type active region by ion implantation in the P-type trench and the N-type trench;
[0061] (d) filling the P-type trench and the N-type trench, and forming a second P-type active region and ...
Embodiment 2
[0100] See Figure 2a-Figure 2s , Figure 2a-Figure 2s It is a schematic diagram of a method for preparing a SiGe-based solid-state plasma PiN diode according to an embodiment of the present invention. On the basis of the first embodiment above, to prepare a SiGe-based solid-state plasma with a channel length of 22 nm (the length of the solid-state plasma region is 100 microns) Taking a bulk PiN diode as an example to describe in detail, the specific steps are as follows:
[0101] Step 1, substrate material preparation steps:
[0102] (1a) if Figure 2a As shown, the SiGeOI substrate 101 with (100) orientation is selected, the doping type is p-type, and the doping concentration is 10 14 cm -3 , the thickness of the top layer SiGe is 50 μm;
[0103] (1b) if Figure 2b As shown, the chemical vapor deposition (Chemical vapor deposition, CVD) method is used to deposit a layer of first SiO with a thickness of 40 nm on SiGe. 2 layer 201;
[0104] (1c) Deposit a layer of first ...
Embodiment 3
[0133] Please refer to image 3 , image 3 It is a schematic diagram of a device structure of a SiGe-based solid-state plasma PiN diode according to an embodiment of the present invention. The solid-state plasmonic PiN diode employs the above-mentioned as figure 1 The preparation method shown is made, specifically, the solid-state plasma PiN diode is prepared and formed on the SiGeOI substrate 301, and the P region 305, the N region 306 of the PiN diode and the lateral position between the P region 305 and the N region 306 The I regions between are all located in the top layer SiGe302 of the substrate. Wherein, the PiN diode can be isolated by STI deep trenches, that is, an isolation trench 303 is provided outside the P region 305 and the N region 306, and the depth of the isolation trench 303 is greater than or equal to the thickness of the top SiGe layer. In addition, the P region 305 and the N region 306 may respectively include a thin-layer P-type active region 307 and ...
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