P-type crystalline silicon bifacial battery structure and manufacturing method thereof
A double-sided battery and crystalline silicon technology, applied in the field of solar cells, can solve the problems of battery leakage and component packaging problems, which have not been well solved, and have not been applied on a large scale. good effect
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Embodiment 1
[0047] (1) On the P-type single crystal silicon wafer, 5×5 through holes arranged equidistantly are formed by laser, and the diameter of a single through hole is 300um.
[0048] (2) Anisotropic etching of the P-type single crystal silicon wafer after making through holes in a KOH solution of about 80 crystals to obtain a surface pyramid structure.
[0049] (3) Use POCl at 800-900 3 The dopant is diffused under low pressure, and an N-type layer is formed on the front surface of the silicon wafer and the surface layer of the through-hole wall. The square resistance after doping is 70Ω / □.
[0050] (4) Using an inkjet method to print paraffin on the through hole and its surrounding area.
[0051] (5) Use wet etching to remove the phosphosilicate glass, back knot and paraffin on the front side of the silicon wafer.
[0052] (6) Annealing the etched silicon wafer in an annealing furnace at 650°C to grow a layer of dense thermal silicon oxide on the surface of the silicon wafer.
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Embodiment 2
[0058] (1) On the P-type polysilicon wafer, 6×6 through holes arranged equidistantly are formed by laser, and the diameter of a single through hole is 200um.
[0059] (2) Put the P-type polysilicon wafer with through-holes in dry plasma texturing equipment to obtain multi-shaped micro-nano structures, and then perform surface modification in BOE solution.
[0060] (3) Use PH3 as an impurity, doping by ion implantation, and then annealing to form an N-type layer on the front side of the silicon wafer and the surface layer of the through-hole wall. The square resistance after doping is 80Ω / □.
[0061] (4) Using an inkjet method to print paraffin on the through hole and its surrounding area.
[0062] (5) Use wet etching to remove the phosphosilicate glass, back knot and paraffin on the front side of the silicon wafer.
[0063] (6) 20nm aluminum oxide and 60nm silicon nitride were successively deposited on the backside of the silicon wafer by PECVD method; 20nm silicon oxide and ...
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