Semiconductor structure and formation method therefor

Abstract

The invention provides a semiconductor structure and a formation method therefor. The formation method comprises the steps of providing a substrate; forming a gate dielectric layer on the substrate; forming a gate layer on the gate dielectric layer; forming an amorphous layer for covering the gate layer; and performing patterning on the gate layer and the amorphous layer to form a gate structure. According to the formation method, by performing non-crystallizing on the gate layer, the amorphous layer is formed; the amorphous layer is non-crystals and atoms in the non-crystals are in unordered arrangement, so that a crystal boundary does not exist; and therefore, a cleaning agent which penetrates through the gate layer to arrive at the gate dielectric layer can be reduced in a subsequent cleaning process, thereby lowering probability of hole generation in the gate dielectric layer.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the continuous improvement of semiconductor manufacturing technology, semiconductor devices are developing towards higher component density and higher integration. The improvement of semiconductor integration has also led to the reduction of transistor size. [0003] The semiconductor substrate, the gate layer and the gate dielectric layer under the gate layer are the basic components of the transistor. The gate dielectric layer plays an important role in the transistor, which can realize the electrical insulation between the gate and the channel of the transistor, and make the gate and the channel of the transistor form a capacitive structure, so that the control of the gate to the channel current can be realized. [0004] As the size of the transistor decreases, the ...

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Problems solved by technology

However, the quality of the gate dielectric layer formed by the prior art is not high, which affects the performance of the transistor and reduces the yield rate of semiconductor device manufacturing

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