Unlock instant, AI-driven research and patent intelligence for your innovation.

How the transistor is formed

A technology of transistors and semiconductors, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc.

Active Publication Date: 2019-12-03
SEMICON MFG INT (SHANGHAI) CORP +1
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The performance of the transistor formed by the prior art still needs to be further improved

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • How the transistor is formed
  • How the transistor is formed
  • How the transistor is formed

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] As mentioned in the background art, the performance of transistors formed in the prior art needs to be further improved.

[0032] Please refer to figure 1 , is a structural schematic diagram of a transistor formed in the prior art.

[0033] The transistor includes a semiconductor substrate 10, a gate structure located on the surface of the semiconductor substrate 10, and source and drain electrodes 11 located in the semiconductor substrate 10 on both sides of the gate structure. The gate structure includes a first material layer 21 and The second material layer 22, the first material layer 21 is a metal gate, including a work function layer and a gate layer, part of the second material layer 22 is located between the first material layer and the semiconductor substrate 10, part of the second material layer The layer 22 covers the sidewall of the first material layer 21 , and the second material layer 22 includes a gate dielectric layer, a cap layer on the surface of th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a formation method of a transistor. The formation method comprises the steps that a semiconductor substrate is provided, the semiconductor substrate comprises a first region, the surface of the semiconductor substrate is provided with a dielectric layer and a first groove which penetrates through the dielectric layer, and the first groove is arranged on the first region; a gate dielectric layer and a cap layer which is arranged on the surface of the gate dielectric layer are formed on the surface of the internal wall of the first groove in turn; a first mask layer is formed on the surface of the cap layer, and the first mask layer covers partial cap layer arranged at the bottom part of the first groove; the cap layer arranged on the sidewall of the first groove is removed with the first mask layer acting as the mask so that the surface of the gate dielectric layer on the surface of the sidewall of the first groove is exposed; the first mask layer is removed so that an etching barrier layer covering the gate dielectric layer and the cap layer is formed; a work function layer is formed on the etching barrier layer; and a gate layer fully filling in the first groove is formed on the work function layer. The performance of the formed transistor can be enhanced by the method.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a transistor. Background technique [0002] With the continuous improvement of the integration level of semiconductor devices and the reduction of technology nodes, the traditional gate dielectric layer continues to become thinner, and the leakage of transistors increases accordingly, causing problems such as waste of power consumption of semiconductor devices. In order to solve the above problems, the prior art provides a solution of replacing the polysilicon gate with a metal gate. Among them, the "gate last" process is a main process for forming high-K metal gate transistors. [0003] The existing method for forming a high-K metal gate transistor using a gate-last process includes: providing a semiconductor substrate on which a dummy gate structure is formed and located on the semiconductor substrate and covering the dummy gate structure The inter...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/28H01L29/423
CPCH01L21/28H01L29/423H01L29/4236H01L29/66477
Inventor 神兆旭
Owner SEMICON MFG INT (SHANGHAI) CORP