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MOS tube parameter degradation circuit and MOS tube parameter degradation warning circuit

A parameter degradation, MOS tube technology, applied in the field of monitoring, can solve the problems of reducing the accuracy of early warning signals, inaccurate output signals, and the inability to accurately analyze the degree of device parameter degradation, etc.

Active Publication Date: 2019-10-18
CHINA ELECTRONICS PROD RELIABILITY & ENVIRONMENTAL TESTING RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At this stage, the research on the NBTI effect is mainly focused on the performance degradation of integrated circuits. Among them, in the monitoring circuit of the device parameter degradation characteristics caused by the NBTI effect, due to the fact that the circuit will be subjected to HCI (hot carrier injection, hot carrier injection) while the circuit is working ), NBTI and TDDB (time dependent dielectric breakdown, time-dependent dielectric breakdown) and other effects, therefore, the output signal output by the above circuit will be affected by various effects, and the output signal is not accurate
Due to the inaccuracy of the above output signal, it is also impossible to accurately analyze the degradation degree of the device parameters of the PMOS tube under the NBTI effect, thereby reducing the accuracy of the early warning signal

Method used

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  • MOS tube parameter degradation circuit and MOS tube parameter degradation warning circuit
  • MOS tube parameter degradation circuit and MOS tube parameter degradation warning circuit
  • MOS tube parameter degradation circuit and MOS tube parameter degradation warning circuit

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Embodiment Construction

[0036] In order to further illustrate the technical means adopted and the effects achieved by the present invention, the technical solutions of the embodiments of the present invention will be described clearly and completely in conjunction with the accompanying drawings and preferred embodiments.

[0037] See figure 1 with figure 2 , A MOS transistor parameter degradation circuit, including a CMOS inverter, a stress application circuit, and a parameter measurement circuit; the CMOS inverter includes a first PMOS tube M10 and a first NMOS tube M9; the first PMOS tube M10 The gate is connected to the gate of the first NMOS transistor M9 as the input terminal of the CMOS inverter; the drain of the first PMOS transistor M10 is connected to the drain of the first NMOS transistor as the The output terminal of the CMOS inverter; the source of the first PMOS tube M10 is connected to the power supply VDD, and the source of the first NMOS tube M9 is grounded to GND; the input terminal of ...

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Abstract

The invention relates to a MOS tube parameter degradation circuit, which comprises a CMOS inverter, a stress applying circuit and a parameter measuring circuit. The CMOS inverter comprises a first PMOS tube and a first NMOS tube. The stress applying circuit becomes on under the control of a first mode-select signal. After the stress applying circuit receives a control signal, it exerts negative gate voltage bias stress or positive gate voltage bias stress on the first PMOS tube of the CMOS inverter. The parameter measuring circuit becomes on under the control of a second mode-select signal. The parameter measuring circuit receives an input signal and transmits the input signal to the input end of the CMOS inverter. The first mode-select signal and the second mode-select signal are compensation signals. With the invention, it is possible to make the MOS tube parameter degradation testing result more accurate. In addition, the invention also relates to a MOS tube parameter degradation early warning circuit, which can accurately analyze the influence of NBTI effect on PMOS tube component parameters.

Description

Technical field [0001] The present invention relates to the field of monitoring technology, in particular to a MOS tube parameter degradation circuit, a MOS tube parameter degradation early warning circuit, and another MOS tube parameter degradation early warning circuit. Background technique [0002] NBTI (Negative Bias Temperature Instability, negative bias temperature instability) effect refers to the PMOS (positive channel Metal Oxide Semiconductor) under high temperature and negative gate voltage bias stress, which refers to n-type substrate, p-channel, relying on holes Under the influence of the NBTI effect, the threshold voltage of the PMOS transistor of the device will drift, and the drain saturation current and transconductance will decrease, which will cause the device and even the entire The circuit fails. [0003] At present, high-performance CMOS (Complementary Metal Oxide Semiconductor) integrated circuits have been widely used in various electronic systems. Among t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66H01L23/544G01R31/26
Inventor 恩云飞雷登云陈义强何春华黄云
Owner CHINA ELECTRONICS PROD RELIABILITY & ENVIRONMENTAL TESTING RES INST