Trench type transistor structure and manufacturing method thereof

Abstract

The present invention discloses a trench type transistor structure and a manufacturing method thereof. According to the present invention, a strip-like trench is formed on the surface of a substrate, channel layers are formed on the side wall and at the bottom of the trench by injection, a gate electrode dielectric layer is formed at the inner wall of the trench; a gate electrode material is filled in the trench to form a gate electrode, at the same time, an annular source and a drain that surround the trench are formed at the strip-like two sides and the bottom of the trench at the outer sides of the channel layers. By improving a conventional mode of forming the gate electrode on the substrate into a mode of forming the gate electrode in the substrate, a planar COMS technology can be compatible completely, so that the performance of a transistor can be enhanced, at the same time, a complicated non-planar technology in the FINFET manufacturing is also avoided, and accordingly, the simplification of the process integration and the reduction of the cost are easier.

Description

technical field [0001] The present invention relates to the technical field of semiconductor integrated circuit manufacturing, and more specifically, to a trench transistor structure and a manufacturing method thereof. Background technique [0002] The semiconductor integrated circuit (IC) industry has undergone rapid development. During the development of ICs, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest device or interconnect line that can be made using a fabrication process) has decreased. The improvement of IC performance is mainly achieved by continuously shrinking the size of integrated circuit devices to increase its speed. The advantages of this scaled-down process are increased production efficiency and reduced associated costs. At the same time, this scaled-down process also increases the complexity of handling and manufacturing ICs. [0003] In the process of seekin...

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Problems solved by technology

[0004] However, FinFET devices need to be integrally fabricated on the substrate and form a consistent structure; because the non-planar process in the fabrication of FinFET devices is incompatible with the existing CMOS planar process, the formation process of FinFET devices is very complicated and costly. High, which restricts the rapid development of FinFET devices to low-cost, high-efficiency production

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