Multi-site semaphore detection and failure determining system and method

A technology for judging systems and semaphores, which is applied in the field of chip semaphore detection and failure judgment systems in the mass production stage, and can solve problems such as increased difficulty in maintainability, increased design costs and testing time, and misjudgments of testers.

Inactive Publication Date: 2018-01-05
CHIPSEA TECH SHENZHEN CO LTD
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Problems solved by technology

[0002] At present, the existing detection devices are mainly used in the research and development stage. In the mass production stage, there are disadvantages and high investment. The device voltage, current, and pin failure judgment and repair are independent and separate, and multiple failure detections cannot be performed at the same time. They can only be applied to a single chip. For testing, the detection device based on the 8-bit MCU architecture has a single function, few internal integrated peripherals, small program and data storage space, low chip operating frequency, and low data transmission rate, resulting in simple software hierarchical design and low versatility. The development of a new detection and failure judgment device, the external input signal is unstable due to various reasons, resulting in unreliable data, heavy repetitive workload, and the detection equipment does not have a complete detection method for problems caused by the failure of th

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  • Multi-site semaphore detection and failure determining system and method
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  • Multi-site semaphore detection and failure determining system and method

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[0045] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0046] figure 1 , figure 2 Shown is the structural block diagram and hardware block diagram of the electronic equipment system for multi-chip semaphore detection and failure judgment realized by the present invention, as shown in the figure. The system integrates multi-index semaphores into a system for detection and failure judgment, including the detection of the physical connection characteristics of the chip itself, which greatly improves work efficiency, and performs preprocessing and display according to relevant issues, and stores the data in mobile storage It is convenient to copy and an...

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Abstract

The invention discloses a multi-site semaphore detection and failure determining system and method. The system herein implements through an embedded microprocessor and a LCD display module. The embedded microprocessor includes a command processing module, a data storage module, a firmware updating module, an OS detection and repair module, a power voltage control module, an input and output semaphore detection module, a key processing module, a failure processing module, and a handler control module. The system provides necessary means for analyzing and detecting chip DC characteristic indexesby a mass production terminal, integrates a multi-index semaphore set to one system for performing detection and failure determination, comprises detection of chip physical connection characteristics, and greatly increases working efficiency.

Description

technical field [0001] The invention belongs to the technical field of chip detection, and in particular relates to a system and method for chip semaphore detection and failure judgment applied in the mass production stage. Background technique [0002] At present, the existing detection devices are mainly used in the research and development stage. In the mass production stage, there are disadvantages and high investment. The device voltage, current, and pin failure judgment and repair are independent and separate, and multiple failure detections cannot be performed at the same time. They can only be applied to a single chip. For testing, the detection device based on the 8-bit MCU architecture has a single function, few internal integrated peripherals, small program and data storage space, low chip operating frequency, and low data transmission rate, resulting in simple software hierarchical design and low versatility. The development of a new detection and failure judgmen...

Claims

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Application Information

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IPC IPC(8): G01R31/28
Inventor 庞新洁
Owner CHIPSEA TECH SHENZHEN CO LTD
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