A kind of qfn chip pcb packaging method and pcb board

A packaging method and PCB board technology, which is applied in the direction of assembling printed circuits with electrical components, semiconductor/solid-state device components, semiconductor devices, etc., can solve problems such as poor welding, achieve low cost, solve the problem of poor welding, and be easy to implement Effect
CN107613666BActive Publication Date: 2021-06-22QINGDAO HAIER SMART TECH R & D CO LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
QINGDAO HAIER SMART TECH R & D CO LTD
Publication Date
2021-06-22

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Abstract

The invention discloses a QFN chip PCB packaging method and a PCB board. The method includes: determining a pin pad that needs to be electrically connected to an intermediate pad, and electrically connecting the pin pad and the intermediate pad through a wiring layer; Adjust the size of the solder mask of the pin pad electrically connected to the middle pad or / and the size of the solder mask of the middle pad so that the distance between the solder mask of the pin pad and the solder mask of the middle pad ≥ Set the distance. The QFN chip PCB packaging method and the PCB board of the present invention solve the problem of poor soldering of the QFN chip in the reflow soldering process, ensure that the performance of the chip itself is not affected, ensure the stability of the chip work and the heat dissipation effect, and improve product reliability. Reduce the defective rate in the market; and the method is simple, easy to realize, without adding additional material costs, and low in cost.
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Description

Technical field

[0001] The present invention belongs to the field of PCB packaging, in particular, to a PCB packaging method and a PCB plate of a QFN chip. Background technique

[0002] In recent years, due to the QFN package (Quadflat no-Lead package, square flat-free packages) has good electrical and thermal performance, small size, light weight, and its application is rapid growth.

[0003] The bottom of the QFN element has a welding end of the bottom surface, has a large area of ​​bare welding in the center to heat the heat, surrounding the periphery of the large weld, there is an I / O pad (pin), I / O welding end of electrical connection. There are two types: one side of only the bottom of the element is exposed, and the other portions are packaged within the component; the other weld end has a portion of the side of the component.

[0004] When the PCB design is performed using the standard QFN chip package, when the pin of the QFN chip is connected to the bare pad in the ...

Claims

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