A kind of 3d NAND storage device and its manufacturing method

Abstract

The present invention provides a method for manufacturing a 3D NAND storage device. By forming a stacked layer alternately stacked with sacrificial layers and insulating layers on a substrate, a channel hole and a storage device in the channel hole are formed in the first region of the stacked layer. layer, forming a covering layer on the stacked layer, wherein etching holes with different apertures are formed in the covering layer in the second region, and the covering layer is used as a shield to etch the stacked layer to form a contact hole under the etching hole, Different contact holes stop at different sacrificial layers. During the etching process, the larger the diameter of the etching hole, the greater the etching rate of the underlying stacked layer, so that the contact hole under the larger etching hole can have a deeper hole depth, thus achieving different depths of contact. The holes are etched to form contact holes corresponding to different sacrificial layers. For storage devices with multiple stacked layers, the complex manufacturing process and high cost caused by etching multi-layer steps are avoided, the area required for the device is reduced, and the yield rate of the wafer is improved.

Description

technical field [0001] The invention relates to the field of semiconductor devices and manufacturing thereof, in particular to a 3D NAND device and a manufacturing method thereof. Background technique [0002] NAND flash memory is a better storage device than hard disk drives, and it has been widely used in electronic products as people pursue non-volatile storage products with low power consumption, light weight and high performance. At present, the planar structure NAND flash memory is close to the limit of practical expansion. In order to further increase the storage capacity and reduce the storage cost per bit, a 3D structure NAND memory device is proposed. [0003] In the 3D NAND memory device structure, a stacked three-dimensional memory device is realized by vertically stacking multi-layer memory cells. When manufacturing 3D NAND storage devices, first form a stack layer in which insulating layers and sacrificial layers are stacked alternately, and through multiple p...

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Problems solved by technology

[0004] In this manufacturing process, contact plugs are formed on the step area, and as the number of stacked layers continues to increase, more photolithography and etching processes are required to form a step shape, which greatly increases the manufacturing cost. At the same time, the number of steps The more, the larger the area of ​​the stacked layers that need to be formed, which is not conducive to improving the integration of the memory device. In addition, the more the number of stacked layers, the greater the warpage of the wafer, and the formation of the contact plug and the step surface in the stepped area. The alignment will be more difficult, affecting the performance of the device, which is not conducive to the improvement of wafer yield

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