Three-valued reversible counter using carbon nano-field effect transistor

Abstract

The invention discloses a three-valued reversible counter using a carbon nano-field effect transistor. The three-valued reversible counter comprises a low-bit counting unit and n high-bit counting units with the same circuit structure, wherein the low-bit counting unit comprises a three-valued pulse type D trigger, a first alternative selector, a first modulo-1 circuit, and a first modulo-2 circuit; the high-bit counting unit comprises a second three-valued pulse type D trigger, a second alternative selector, a second modulo-1 circuit, a second modulo-2 circuit and a carry / borrow circuit. Thethree-valued reversible counter disclosed by the invention has the advantage that the clock signal of each level of counting unit is input after the clock signal of the former level of counting unit is processed through the carry / borrow circuit, thereby guaranteeing that each level of counting unit only needs to receive the clock signal in the counting time, the redundancy hop of the counter produced by the change of the clock signal is reduced, and the dynamic power consumption of the circuit is lowered.

Description

technical field [0001] The invention relates to a counter, in particular to a three-value reversible counter utilizing carbon nano field effect transistors. Background technique [0002] With the rapid development of the information society, the integrated circuit industry is also constantly developing. Traditional digital circuits are designed by binary logic, so the integration and information volume of the chip are restricted by binary logic and cannot be further improved. In this context, multi-valued logic appears and develops to further improve the integration of chips. In terms of information carrying capacity, multi-valued logic carries more information on each signal line than binary logic. Therefore, compared with binary logic, multi-valued logic can process the same data with fewer signal lines, thereby effectively reducing the number of signal lines and chip area and improving the information density of integrated circuits. [0003] Due to the good electrical p...

AI Technical Summary

Problems solved by technology

At present, when using the two-digit three-value counter to construct a multi-bit counter, the JK flip-flop, the three-value word 2 operation circuit and the binary AND gate are sequentially added and cascaded as a unit, and the clock input terminals of all JKL flip-flops are Connected to the same clock signal, so whenever the clock signal changes, the transistor inside the JKL flip-flop that does not need to change will have redundant state changes, thereby increasing the power consumption of the circuit, so that the counter consumes a lot of power

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