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SoC (System on a Chip) chip resetting method and resetting system

A reset method and chip technology, applied in the field of power transmission, can solve problems such as poor reset reliability of SoC chips

Active Publication Date: 2018-02-16
GLOBAL ENERGY INTERCONNECTION RES INST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Therefore, the technical problem to be solved by the present invention is to overcome the defect of poor reset reliability of the SoC chip in the prior art under complex electromagnetic environment

Method used

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  • SoC (System on a Chip) chip resetting method and resetting system
  • SoC (System on a Chip) chip resetting method and resetting system
  • SoC (System on a Chip) chip resetting method and resetting system

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Embodiment 1

[0036] This embodiment provides a SoC chip reset method, which has strong anti-interference ability and high reset reliability. The normal operation of the module and even the DC transmission system plays a vital role. As the core control part of the SMC, the SoC (System on Chip) chip is normally and reliably reset in the strong electromagnetic field environment of the flexible DC transmission converter valve hall. Particularly important.

[0037] The SoC chip includes a logic module and a processor module. In this embodiment, the logic module is an FPGA module, and the processor module is an ARM processor module. The FPGA module and the ARM processor module constitute the SOC chip. In order to reset the SOC chip, avoiding ARM's poor anti-interference ability in a strong electromagnetic field environment, there may be problems such as crashes, which will cause the chip to fail to reset normally and endanger the normal operation of the sub-module. In this embodiment, a reset ch...

Embodiment 2

[0060] This embodiment provides a SoC chip reset system, which is used to implement the embodiment and preferred implementation mode in Embodiment 1, and what has been explained will not be repeated. As used below, the term "module" may be a combination of software and / or hardware that realizes a predetermined function. Although the systems described in the following embodiments are preferably implemented in software, implementations in hardware, or a combination of software and hardware are also possible and contemplated.

[0061] Figure 5 It is a system block diagram of the SoC chip reset system according to the embodiment of the present invention, which is applied to the reset chip, and the reset chip is connected to the SoC chip. The SoC chip includes a logic module and a processor module. In this embodiment, the logic module is an FPGA module. The processor module is an ARM module, and the first detection signal includes a square wave signal sent by the FPGA module. The...

Embodiment 3

[0070] The embodiment of the present invention also provides a computer-readable storage medium, on which computer-executable instructions are stored, and the computer-executable instructions can execute any of the logic modules used in the SoC chip in the first embodiment above. SoC chip reset method. Wherein, the storage medium can be a magnetic disk, an optical disk, a read only memory (Read Only Memory, ROM), a random access memory (Random Access Memory, RAM), a flash memory (FlashMemory), a hard disk (Hard Disk Drive, Abbreviation: HDD) or solid state disk (Solid State Drive, SSD), etc.; the storage medium may also include a combination of the above types of storage.

[0071] This embodiment also provides a reset chip, which can be combined with Figure 5 The described system is used to realize a kind of SoC chip reset method, promptly is used to realize such as figure 1 The SoC chip reset method in the embodiment.

[0072] see Figure 8 , Figure 8 It is a schematic...

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Abstract

The invention provides a SoC (System on a Chip) chip resetting method and resetting system. The method comprises the following steps that: receiving a first detection signal emitted from a logic module of the SoC chip; judging whether the first detection signal is a normal signal or not, wherein the normal signal is a signal generated when the SoC chip normally works; when the first detection signal is not a normal signal, sending a reset effective signal to the logic module of the SoC chip, wherein the reset effective signal is used for resetting the SoC chip. By use of the SoC chip resettingmethod, the SoC chip can be guaranteed to normally work under a complex electromagnetic environment and reliably reset, and the method has high anti-jamming capability.

Description

technical field [0001] The invention relates to power transmission technology, in particular to a SoC chip reset method and reset system. Background technique [0002] The Modular Multilevel Converter (MMC) is composed of multiple sub-modules (SM) with the same structure, and is one of the important converter topologies of the flexible DC transmission system. When MMC is applied in the field of high-voltage and large-capacity flexible DC transmission, hundreds or even thousands of sub-modules need to be connected in series, and each sub-module has an independent sub-module controller (Sub Module Controller, SMC) to realize the control, protection and communication of sub-modules Therefore, the working performance of the SMC plays a vital role in the normal operation of the sub-module and even the DC transmission system. [0003] The SoC (System on Chip) chip that has been gradually developed in recent years is a preferred solution as the core control chip of the sub-module ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/24G06F11/07
CPCG06F1/24G06F11/0757
Inventor 苑晓垚邓卫华杨卫刚吕铮
Owner GLOBAL ENERGY INTERCONNECTION RES INST CO LTD
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