Multi-phase filter digital channelization realization method

Abstract

The invention provides a multi-phase filter digital channelization realization method. The method comprises the following steps: (1) firstly quantizing an intermediate frequency signal as a digital signal through a digital / analog converter, and decreasing the digital signal to a baseband signal through a digital down-conversion module DDC; and (2) setting a sampling frequency fs, dividing into D sub-channels, performing D-times extraction at the front end of a multi-phase filter, enabling the extracted signal to enter the multi-phase filter to be filtered. The frequency band can be divided into multiple independent sub-band channels by using the digital channelization technology, the parallel computation can be realized among various sub-band channels. A computer simulation result verifiesthe correctness of the efficient structure. And meanwhile, the structure design is realized by using a FPGA, and the multi-channel parallel operation advantage is sufficiently reflected.

Description

technical field [0001] The invention belongs to the field of photoelectric communication, and in particular relates to a method for realizing digital channelization of polyphase filtering. Background technique [0002] Channelized receiver is a very promising signal receiver in current electronic systems, and it is widely used in various fields. The accuracy, resolution, and sensitivity of this receiver can reach the level of narrow-band heterodyne receivers, and it has 100% wideband receivers. It is these characteristics that channelized receivers are very adaptable to various signals; [0003] With the rapid development of DSP and FPGA, it has become a trend to replace traditional analog channelization technology with digital technology. According to the current soft radio receiver category, both RF low-pass sampling and band-pass sampling reduce the use of analog devices. With the current use of high-sampling rate A / D, two parallel sampling methods can achieve high speed...

AI Technical Summary

Problems solved by technology

[0003] With the rapid development of DSP and FPGA, it has become a trend to replace traditional analog channelization technology with digital technology. According to the current soft radio receiver category, both RF low-pass sampling and band-pass sampling reduce the use of analog devices. With the current use of high-sampling rate A / D, two parallel sampling methods can achieve high speed, but with the increase of sampling rate, another problem is how to solve the problem of high-speed A / D chips and signal processors. the contradiction between

The data flow rate after sampling is very high, which will cause the subsequent signal processing speed to be unable to keep up, especially for some synchronous demodulation algorithms, which have a large amount of calculation. If the data throughput rate is too high, it is difficult to meet the real-time requirements. How to solve the contradiction between the high-speed A / D chip and the signal processor is a common problem in the prior art

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