Semiconductor device and manufacturing method thereof and electronic device

Abstract

The invention provides a semiconductor device and a manufacturing method thereof and an electronic device. The manufacturing method comprises the following steps of providing a semiconductor substrateand forming fins on the semiconductor substrate; forming grooves for forming isolation structures in the semiconductor substrate between the fins; filling the grooves to form the isolation structures; and forming a gate, a source and a drain on each fin, wherein each source and drain are located at two sides of the corresponding gate; the top of each groove extends to the bottom of the corresponding fin; and each isolation structure comprises a part in the semiconductor substrate between the corresponding fins and parts in the semiconductor at the lower parts of the corresponding fins. According to the manufacturing method, the fin structures can be isolated from the semiconductor substrate to the maximum extent, thereby solving the junction leakage problem and reducing the short channeleffect. The semiconductor device and the electronic device have similar advantages.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a semiconductor device, a manufacturing method thereof, and an electronic device. Background technique [0002] With the development of semiconductor technology, the geometric size of the metal-oxide-semiconductor field-effect transistor (MOSFET for short), the main device in integrated circuits, especially VLSI, has been shrinking, and the feature size of semiconductor devices has been reduced to the nanometer level. . With such a feature size of semiconductor devices, the traditional planar method of manufacturing semiconductor devices cannot be applied. Therefore, various new semiconductor device structures have been proposed, among which Fin Field Effect Transistor (FinFET) is an advanced semiconductor device structure for 22nm and below process nodes, which can effectively control the insurmountable short circuit caused by device scaling down. channeling eff...

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Problems solved by technology

[0003] At the same time, ultra-shallow junction, pre-amorphization implantation, stress engineering, etc. are used to optimize LDD and halo doping profiles to improve device performance, but the balance between performance and short channel effect is becoming a big problem

For FinFET devices, in order to better overcome the short channel effect, each fin is separated by an isolation structure to improve the isolation between the fins and between the fin and the substrate, although this can further overcome the short channel effect , but because the doping concentration of the fin is higher than that of the substrate, and in order to facilitate the subsequent contact formation, the source and drain of the fin will choose the epitaxial process to grow the source and drain with a larger contact area, so that due to the corresponding The low doping concentration in the substrate area easily causes diffusion from top to bottom, resulting in a huge junction leakage problem

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