Oxide filling method for top select gate cut

Abstract

The invention provides an oxide filling method for a top select gate cut. By using a high-density plasma chemical vapor deposition (HDP-CVD) method for filling an oxide material in a channel of a topselect gate cut, the obtained oxide effectively resists the harmful etching of the fluorine-containing gas removal during the subsequent formation of the tungsten gate, thereby avoiding the formed etched channel form being filled with tungsten deposition, and further avoiding unnecessary tungsten residues and improving the product performance of the 3D NAND flash memory structure.

Description

Technical field [0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a method for fabricating a 3D NAND flash memory structure, specifically a top layer selective gate tangent oxide filling method for avoiding tungsten residues during the subsequent formation of gate lines and tungsten common source. Background technique [0002] With the development of planar flash memory, the semiconductor production process has made tremendous progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, limits of existing development technology, and limits of storage electron density. In this context, in order to solve the difficulties encountered by planar flash memory and to pursue lower production cost of unit storage unit, various three-dimensional (3D) flash memory structures have emerged, such as 3D NOR (3D or non) flash memory and 3DNAND (3D NAND) flash memory. [0003] A...

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Problems solved by technology

[0013] However, in the above step S6, although atomic layer deposition (ALD) is used for oxide filling, a good filling effect of the top select gate cut trench (Top Select Gate Cut Trench) can be obtained, that is, there is no obvious seam or Void, but the oxide formed by filling in this way has a faster hydrofluoric acid (HF ) Wet etching (Wet Etch) corrosion rate and fluorine-containing gas corrosion rate, so in the subsequent annealing process steps and tungsten gate (W-Gate) formation steps, it is easy to be caused by hydrofluoric acid (HF ) wet etching (Wet Etch) and / or the removal of fluorine-containing gas (Fluorin Outgas), causing the ALD filling oxide 70' to be etched, resulting in butterfly (Disshing) defects in the top area (Top Area), and even Form trench 90 (see Figure 2b ), and the trench 90 is filled with deposited tungsten fill 80 in the subsequent formation step of the tungsten common source (W-ACS) (see Figure 2c ), and in the subsequent tungsten common source (W-ACS) chemical mechanical polishing (CMP), it will also be difficult to remove and become tungsten residue 80’ (W Residue) (see Figure 2d and image 3 ), which directly affects the performance of three-dimensional (3D) flash memory

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