An Automatic Node Removal Method for Approximate Computation of Circuits
A technology of approximate calculation and node deletion, applied in calculation, computer-aided design, electrical digital data processing, etc., can solve the problems of no node deletion process, failure to take into account errors, circuit delays, power consumption, etc., to improve design efficiency, The effect of expanding the scope of application
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[0029] The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0030] The present invention provides an automatic node deletion method for circuit approximation calculation, after a short period of iteration and simulation, the optimal approximation calculation is achieved by adopting a cell sorting method with an optimal energy-delay product and error ratio .
[0031] Such as figure 2 Shown is the structural diagram of applying the automatic node deletion method provided by the present invention to realize approximate calculation in the embodiment, including an information collection module, a data analysis module, a node deletion module and a synthesis and simulation module, and the information collection module is used to collect the synthesis and simulation module The circuit data information generated in and passed to the data analysis module; the data analysis module is used to analyze, process a...
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