Interconnecting wire structure of semiconductor device and manufacturing method of interconnecting wire of semiconductor device

A manufacturing method and technology of interconnection lines, which are applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device parts, semiconductor devices, etc., can solve problems such as interconnection holes and achieve the effect of improving reliability

Pending Publication Date: 2018-04-13
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The object of the present invention is to provide an interconnection structure of a semiconductor device and a method for manufacturing an interconnection of a semiconductor device, so as to solve the problem that there is a certain void at the side of the interconnection formed in the prior art

Method used

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  • Interconnecting wire structure of semiconductor device and manufacturing method of interconnecting wire of semiconductor device
  • Interconnecting wire structure of semiconductor device and manufacturing method of interconnecting wire of semiconductor device
  • Interconnecting wire structure of semiconductor device and manufacturing method of interconnecting wire of semiconductor device

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Embodiment 1

[0092] Specifically, please refer to Figure 5 to Figure 9 ,in, Figure 5 is a schematic cross-sectional view of the substrate provided in the method for manufacturing interconnection lines of a semiconductor device according to Embodiment 1 of the present invention; Figure 6 is true Figure 5 A schematic cross-sectional view of the structure shown after performing a patterned etching process; Figure 7 is in Figure 6 A schematic cross-sectional view of the structure shown after removing the patterned etch barrier layer and the passivation film; Figure 8 is in Figure 7 A schematic diagram of the structure after metal interconnection lines are formed on the shown structure; Figure 9 is in Figure 7 A schematic diagram of the structure after forming a copper seed layer and a copper electroplating layer on the shown structure.

[0093] First, if Figure 5 As shown, a substrate 200 is provided, and a dielectric layer 210 is formed on the substrate 200 . In the embodi...

Embodiment 2

[0130] Specifically, please refer to Figure 12 to Figure 16 ,in, Figure 12 is a schematic cross-sectional view of the substrate provided in the method for manufacturing interconnection lines of semiconductor devices according to Embodiment 2 of the present invention; Figure 13 is true Figure 12 A schematic cross-sectional view of the structure shown after performing a patterned etching process; Figure 14 is in Figure 13 A schematic cross-sectional view of the structure shown after removing the patterned etch barrier layer; Figure 15 is in Figure 14 A schematic diagram of the structure after metal interconnection lines are formed on the shown structure; Figure 16 is in Figure 14 A schematic diagram of the structure after forming a copper seed layer and a copper electroplating layer on the shown structure.

[0131] First, if Figure 12 As shown, a substrate 300 is provided, and a dielectric layer 310 is formed on the substrate 300 . In the embodiment of the pr...

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Abstract

The invention provides an interconnecting wire structure of a semiconductor device and a manufacturing method of an interconnecting wire of the semiconductor device. A dielectric layer in an opening is etched by an etching agent to form a groove in the dielectric layer, wherein in the groove forming process through etching, a passivation thin film is formed to be attached to the side wall, positioned in the groove, of the dielectric layer; by virtue of separation of the passivation thin film, the etching agent does not perform side etching on the part, on the groove side wall, of the dielectric layer; therefore, the groove can be well filled with a metal interconnecting wire easily, thereby avoiding the problem of certain holes existing in the formed metal interconnecting wire side, and improving reliability of the formed metal interconnecting wire and the semiconductor device.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to an interconnection structure of a semiconductor device and a manufacturing method for an interconnection of a semiconductor device. Background technique [0002] With the development of semiconductor technology, the chip integration level of VLSI has reached hundreds of millions or even billions of devices, and multi-layer metal interconnection technology with more than two layers is widely used. Traditional metal interconnects are made of aluminum metal, but with the continuous reduction of device feature size in integrated circuit chips, the circuit density in metal interconnect lines continues to increase, and the required response time continues to decrease. Traditional aluminum Interconnect lines are no longer adequate. After the process size is less than 130nm, copper interconnection technology has replaced aluminum interconnection technology. Compared...

Claims

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Application Information

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IPC IPC(8): H01L21/768H01L23/538
CPCH01L23/5386H01L21/76834
Inventor 不公告发明人
Owner CHANGXIN MEMORY TECH INC
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