Gating switch circuit and memory containing same

Abstract

The invention discloses a gating switch circuit and a memory containing the same. The gating switch circuit comprises a memory unit connecting end, a read switch tube, a programming switch tube, one read input end and a programming input end, wherein the read input end is connected with the memory unit connecting end through the read switch tube and is used for connecting the memory unit connecting end and the read input end when receiving a read control signal. According to the gating switch circuit, an access between the read input end and the memory unit connecting end is connected by controlling one read switch tube, and the purpose of reducing connection resistance of the gating switch circuit, increasing the connection speed and further increasing the reading speed when read operation is performed on a memory unit are achieved.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to a gate switch circuit and a memory including the circuit. Background technique [0002] Flash memory (flash memory) is a kind of non-volatile memory (Non-volatile memory), which uses a nonlinear macro-cell mode inside, has the advantages of large capacity and fast rewriting speed, and is suitable for storing large amounts of data. [0003] In a flash memory, a memory cell can be regarded as a metal-oxide-semiconductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET). figure 1 It is a common MOSFET structure diagram, including a gate 20 , a source 21 , a drain 22 , a P-type silicon semiconductor substrate 23 , and a tunnel oxide layer 24 . The connection between them is as follows: P-type silicon semiconductor substrate 23 diffuses two N-type regions, and a layer of tunneling oxide layer 24 is covered on the top of P-type silicon semiconductor su...

AI Technical Summary

Problems solved by technology

[0005] Obviously, to connect the path between the drain 22 of the memory cell and the read input terminal SENBL of the current comparator 26, it is necessary to turn on the common switch hn2 and the read switch hn3, the on-resistance of which is the common switch hn2 And the resistance of the read switch tube hn3, so the on-resistance is large. To obtain an ideal read voltage, the large on-resistance will make the charging time of the drain of the memory cell longer, which will lead to the slowdown of the read speed. At the same time, the design requirements for the current comparator 26 are higher; at the same time, the first read control signal YA_S that controls the conduction of the common switch hn2 and the second read control signal YB_S that controls the conduction of the read switch hn3 need to be coordinated. , increasing the complexity of the entire read operation

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