Anti-PID PERC battery structure and preparation method thereof
A battery and performance technology, applied in circuits, photovoltaic power generation, electrical components, etc., can solve the problems of poor thin layer compactness, thick thickness, and increased production costs, and achieve high compactness, good anti-PID effect, and excellent compactness. Effect
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[0022] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0023] see Figure 1-2 , the present invention provides a technical solution:
[0024] A PERC battery structure with anti-PID performance, comprising a silicon substrate 1, the front side of the silicon substrate 1 is sequentially provided with a silicon dioxide layer 2 and a front silicon nitride layer 3, and the reverse side of the silicon substrate 1 is sequentially provided with a backside oxidation layer. Aluminum layer 4 and back silicon nitride layer 5...
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