Vertical double-diffusion metal oxide transistor and manufacturing method therefor

Abstract

The invention discloses a manufacturing method for a vertical double-diffusion metal oxide transistor, and the method comprises the following steps: providing an N-type substrate, and sequentially forming an N-type epitaxial layer, a gate oxidation layer, first polysilicon and a silicon nitride side wall on the N-type substrate; forming second polysilicon at the top of the first polysilicon, on the silicon nitride side wall, on the side walls of the gate oxidation layer and on the surface of a P-type body region; carrying out the thermal treatment of the second polysilicon, enabling N-type impurities in the second polysilicon to diffuse to the surface of the P-type body region, and forming an N-type source region on the surface of the P-type body region, wherein the second polysilicon is oxidized into silicon dioxide; forming a contact hole which passes through the silicon dioxide at the opening and the N-type source region and extends to the P-type body region; forming a front metal at one side, far from the first polysilicon, of the silicon dioxide, and forming a back metal at one side, far from the N-type epitaxial layer, of the N-type substrate.

Description

【Technical field】 [0001] The invention relates to the technical field of semiconductor manufacturing technology, in particular to a vertical double-diffused metal oxide transistor and a manufacturing method thereof. 【Background technique】 [0002] The drain and source poles of the vertical double diffused field effect transistor (VDMOS) are respectively on both sides of the device, so that the current flows vertically inside the device, increasing the current density, improving the rated current, and the on-resistance per unit area is also small, which is a A very versatile power device. [0003] However, existing vertical double-diffused field effect transistors have certain problems such as relatively complicated process and high cost. Therefore, there is still room for optimization in terms of manufacturing process simplification and cost reduction of vertical double-diffused field effect transistors. 【Content of invention】 [0004] One object of the present invention ...

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Problems solved by technology

[0003] However, the existing vertical double-diffused field effect transistors have certain problems such as relatively complicated process and high cost. Therefore, there is still a certain room for optimization in terms of manufacturing process simplification and cost reduction of vertical double-diffused field effect transistors.

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