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PCB (printed circuit board) isolation graph copper pouring and distributing secondary etching method

A secondary etching and patterning technology, applied in chemical/electrolytic methods to remove conductive materials, electrical components, printed circuit manufacturing, etc., can solve uneven distribution of patterns, difficulty in consistent current density, uniformity of etching patterns, and pattern tolerances Difficulty and other issues

Inactive Publication Date: 2018-06-22
奥士康精密电路(惠州)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the uneven distribution of patterns, it is difficult to have consistent current densities in different areas during pattern electroplating, and it is difficult to control the uniformity of etching patterns and pattern tolerances, and even lead to poor quality such as sandwiches, small holes, and horn holes.

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0023] A method for secondary etching of PCB isolated pattern copper laying shunt, comprising the following steps:

[0024] a. Optimizing copper laying film;

[0025] b. Graphic transfer;

[0026] c. Graphic plating;

[0027] d. Graphic etching;

[0028] e. The second graphics transfer;

[0029] f. The second etching;

[0030] Wherein, the a step includes making the PCB production draft film, when making the film, a copper block matrix with a side length of 0.5mm is set around the isolated figure, the distance between the copper block matrix is ​​0.2mm, and all figures are made by compensating 1.5mil film data;

[0031] The parameters of the e-step are: Die: lamination speed 2.0±0.5m / min, lamination temperature 110±5°C; exposure: unilateral compensation of 3mil for copper laying and window opening; equipment table vacuum -350mmHg, exposure ruler 7 grid; development: development point control 55 ± 5%.

[0032] The step d is alkaline etching; the step f is acid etching, th...

Embodiment 2

[0035] A method for secondary etching of PCB isolated pattern copper laying shunt, comprising the following steps:

[0036] a. Optimizing copper laying film;

[0037] b. Graphic transfer;

[0038] c. Graphic plating;

[0039] d. Graphic etching;

[0040] e. The second graphics transfer;

[0041] f. The second etching;

[0042] Wherein, described a step comprises making PCB production manuscript film, when making film, set the copper block matrix of side length 0.6mm around the isolated figure, the distance between copper block matrix is ​​0.3mm, all figures are made film data by compensation 1.7mil;

[0043] The parameters of the e-step are: Die: lamination speed 2.0±0.5m / min, lamination temperature 110±5°C; exposure: unilateral compensation of 4mil for copper laying and windowing; equipment table vacuum -360mmHg, exposure ruler 7 grid; development: development point control 55 ± 5%.

[0044] The step d is alkaline etching; the step f is acid etching, the parameters are ...

Embodiment 3

[0046] A method for secondary etching of PCB isolated pattern copper laying shunt, comprising the following steps:

[0047] a. Optimizing copper laying film;

[0048] b. Graphic transfer;

[0049] c. Graphic plating;

[0050] d. Graphic etching;

[0051] e. The second graphics transfer;

[0052] f. The second etching;

[0053] Wherein, described a step comprises making PCB production manuscript film, when making film, arrange the copper block matrix of side length 0.3mm around the isolated figure, the spacing between copper block matrix is ​​0.2mm, all figures are made film data by compensation 2mil;

[0054] The parameters of the e-step are: Die: lamination speed 2.0±0.5m / min, lamination temperature 110±5°C; exposure: unilateral compensation of 5mil for copper laying and windowing; equipment table vacuum -370mmHg, exposure ruler 7 grid; development: development point control 55 ± 5%.

[0055] The step d is alkaline etching; the step f is acid etching, the parameters are...

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PUM

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Abstract

The invention relates to the technical field of PCB (printed circuit board) processing, and discloses a PCB isolation graph copper pouring and distributing secondary etching method which includes thesteps: a copper pouring film optimization; b graph transfer; c graph electroplating; d graph etching; e secondary graph transfer; f secondary etching. The method is applicable to secondary etching ofcopper pouring and distributing of PCBs with locally isolated graphs and the copper thickness smaller than 2OZ, production defect rate is greatly reduced, and the method is low in cost, high in efficiency and suitable for large-scale popularization.

Description

technical field [0001] The invention relates to the technical field of PCB processing, in particular to a method for secondary etching of PCB isolated pattern copper laying and shunting. Background technique [0002] With the development of functional diversity of electronic products, more and more performances are carried by PCB, such as RF line design on PCB, local plug-in signal transmission, local high voltage design, etc. This type of design requires partial or entire graphic isolation of PCB (Isolated graphics design refers to the layout of double lines, double pads, double holes or other special-shaped graphics in the open area, and there is not enough space between the graphics to ensure compensation). Due to the uneven distribution of patterns, it is difficult to have consistent current densities in different areas during pattern plating, and it is difficult to control the uniformity of etching patterns and pattern tolerances, and even lead to poor quality such as f...

Claims

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Application Information

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IPC IPC(8): H05K3/06
CPCH05K3/06H05K2203/052
Inventor 付雷黄勇贺波
Owner 奥士康精密电路(惠州)有限公司
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