Level translation circuit
A technology for converting circuits and levels, applied in fail-safe circuits, logic circuit interface devices, logic circuit connection/interface layout, etc., can solve problems such as level conversion circuits not working normally, MOS tube breakdown, etc., to improve reliability performance, to ensure the effect of normal work
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[0019] Embodiments of the present invention are described in detail below with reference to the accompanying drawings.
[0020] figure 2 A schematic structural diagram showing an example of the level conversion circuit provided by the embodiment of the present invention. figure 2 The level conversion circuit shown realizes the conversion of the input signal IN into the output signal OUT.
[0021] Such as figure 2 As shown, the level conversion circuit provided by the embodiment of the present invention includes a first NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3, a fourth NMOS transistor M4, a fifth NMOS transistor M5, and a sixth NMOS transistor M6 , the first PMOS transistor M7, the second PMOS transistor M8, the third PMOS transistor M9, the fourth PMOS transistor M10, the NPN transistor Q1, the NPN transistor Q2, the NPN transistor Q3, the NPN transistor Q4, the first inverter INV1, the second an inverter INV2, and a third inverter INV...
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