Systems and methods for optimal trim calibration in integrated circuits
A circuit and trim code technology, applied in the field of systems and methods for optimal trim calibration in integrated circuits, can solve problems such as difficulty in realizing trim code combinations and the like
Active Publication Date: 2022-02-08
TEXAS INSTR INC
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This may require the designer / test engineer to perform complex optimization sequences involving iterative tuning of different trim codes one at a time
Also, because optimization of the second component alters optimization of the first component, it may be difficult to achieve an overall optimal combination of trim codes
Method used
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[0010] In this description, if a first device couples to a second device, that connection may be through a direct connection, or through an indirect connection via other devices and connections. The statement "based on" is intended to mean "based at least in part on." Thus, if X is based on Y, then X can be based on Y and any number of other factors.
[0011] Many circuits require trimming for optimization and / or to meet specifications. Therefore, these circuits require calibration of various components. A component in a circuit is any subsection of the circuit whose parameter values can be changed to tune / control the operation of the circuit. Examples are resistors, capacitors, delay lines and transistors (transistor biasing). When a circuit is being trimmed, different trim codes are read into the circuit and applied to corresponding components of the circuit. These trim codes are specific calibration parameters for corresponding components of the circuit. In conventio...
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In the depicted example, a test circuit (100) includes a circuit to be calibrated (102), an error generation circuit (110), and a simplex circuit (112) coupled to each other. The circuit to be calibrated (102) is configured to implement a first plurality of trim codes (122-126) as calibration parameters for a corresponding plurality of components of the circuit to be calibrated and to generate an actual output (106). The error generating circuit (110) is configured to generate an error signal based on a difference between the actual output (106) and the expected output (108) of the circuit (102) to be calibrated. The simplex circuit (112) is configured to receive the error signal from the error generation circuit (110), use the simplex algorithm to generate a second plurality of trim codes (122-126) based on the error signal ) and transmit the second plurality of trim codes (122 to 126) to the circuit to be calibrated (102).
Description
Background technique [0001] Many circuits (eg, analog, radio frequency (RF) and / or mixed-signal circuits) require trimming of various components (eg, resistors, capacitors, delay lines, and / or transistor biases) to meet specifications. The process of fine-tuning these components may be referred to as trimming. When a circuit is being trimmed, different trim codes are read into the circuit and applied to corresponding components of the circuit. These trim codes are specific calibration parameters for corresponding components of the circuit. Each possible trim code for each component is then applied to its corresponding component until the circuit meets its specification. Many times, this calibration process involves tuning multiple interdependent trimming codes to produce the desired output. This may require the designer / test engineer to perform a complex optimization sequence involving iteratively tuning the different trim codes one at a time. Also, because optimization of...
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IPC IPC(8): G06F11/26
CPCG01R31/2822G06F11/24G06F11/2268G06F11/263G06F11/273
Inventor 潘卡伊·邦加莱帕塔·高希鲁宾·阿吉特·佩尔科治
Owner TEXAS INSTR INC