Multi-pipeline real-time high-speed sorting engine system

A high-speed, streamlined technology, applied in memory systems, program control design, instruments, etc., to achieve the effect of simplifying the circuit structure and improving execution efficiency

Active Publication Date: 2018-11-13
NANJING UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] At present, the most common type of sorting implementation in hardware is bubble sorting, but bubble sorting will have many repeated comparison operations

Method used

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  • Multi-pipeline real-time high-speed sorting engine system
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  • Multi-pipeline real-time high-speed sorting engine system

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Embodiment Construction

[0032] The method of the present invention will be described in detail below in conjunction with the drawings.

[0033] Such as figure 1 , The multi-pipeline real-time high-speed sorting engine system of this embodiment uses a 16-stage pipeline structure and a bubble sorting algorithm to implement the sorting engine. In this embodiment, each stage of the pipeline is a basic sorting unit (Basic Sorting Unit, hereinafter referred to as BSU), which receives data from the input terminal Bin, compares it with the data in the original BSU, and keeps the larger number and the smaller number. Output to the next stage of pipeline through the output terminal Bout, after 16 stages of pipeline, the largest 16 numbers will be retained, and the smallest number will be output. Each data entering the engine will have a count flag indicating the data arrival time. The newly entered data is counted as b10000, and 1 is added every clock cycle until the count is b00000, which means that the data ha...

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Abstract

The invention relates to a hardware realizing method of a multi-pipeline real-time high-speed sorting engine. The multi-pipeline real-time high-speed sorting engine comprises: basic sorting units forrealizing real-time sorting through pipelines by using a bubble sorting algorithm; a data selecting unit for calculating an address selecting signal addr for selecting data needed to be outputted; anda data outputting unit for outputting data according to the address selecting signal addr, wherein the data outputting unit is provided with two outputs: a serial output and a class memory output, the serial output is used for outputting smallest numbers and the class memory output is used for outputting sorted sequences. The method has the beneficial effects that: the two outputs: the serial output and the class memory output can be provided aiming at different application scenarios and all data can be directly searched and IO (Input/Output) resources can be saved by means of the class memory output mode; and data reuse is realized by using Domino logic technique in the design of the data selecting unit, so that the resource utilization rate is effectively improved.

Description

Technical field [0001] The invention belongs to the field of high-speed sorting engines, and particularly relates to a multi-flow real-time high-speed sorting engine system. Background technique [0002] The sorting algorithm is a classic and commonly used algorithm. Its purpose is to sort an unordered sequence into an ordered sequence after multiple comparisons. With the rapid development of computer technology, sorting has gradually become a basic algorithm in contemporary programming. In the Internet era, modern applications have higher and higher real-time requirements for sorting. In contemporary operating systems, the CPU spends a large proportion of the running time on sorting. According to statistics, sorting-related operations account for 25%-50% of all computer work, especially in the commercial field. In a batch processing system, the CPU spends 15%-70% of the time performing sorting tasks. Sorting not only has very important practical significance, but also because...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/02G06F9/302
CPCG06F7/02G06F9/30021
Inventor 李丽樊朝煜刘禹楠傅玉祥何书专
Owner NANJING UNIV
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