Semiconductor structures and methods of forming them

Abstract

The invention relates to a semiconductor structure and a formation method thereof. The method includes the following steps that: a substrate is provided, wherein the substrate includes an NMOS regionand a PMOS region which are adjacent to each other; gate structures are respectively formed at the NMOS region and the PMOS region on the substrate; a polysilicon interconnection layer is formed on portions on the substrate which are not covered by the gate structures; P type source-drain doped regions are formed in the substrate at two sides of the gate structure at the PMOS region; the polysilicon interconnection layer at the PMOS region is doped with blocking ions; and N type source-drain doped regions are formed in the substrate at two sides of the gate structure at the NMOS region after the polysilicon interconnection layer at the PMOS region is doped with the blocking ions. According to the semiconductor structure and the formation method thereof of the invention, the polysilicon interconnection layer at the PMOS region is doped with the blocking ions, so that N type ions can be prevented from diffusing into the PMOS region through the polysilicon interconnection layer when the Ntype source-drain doped region is formed, and therefore, the speed of a formed P type device can be improved.

Description

Technical field [0001] The present invention relates to the field of semiconductors, in particular to a semiconductor structure and a method of forming the same. Background technique [0002] With the gradual development of semiconductor process technology, the process size of semiconductor devices is getting smaller and smaller. [0003] Correspondingly, for MOS devices, the gate structure size, the active area (AA) size, and the contact hole plug (Contact, CT) size are also reduced accordingly. Therefore, in the manufacturing process of the semiconductor structure, after the source and drain doped regions and the gate structure are formed, the poly-interconnect is used to form the gate structure or the source and drain doped regions. Local interconnects can reduce the number of contact hole plugs, thereby reducing the process size of semiconductor devices. [0004] However, after the introduction of the polysilicon interconnection layer, the electrical performance of the formed s...

AI Technical Summary

Problems solved by technology

[0004] However, the introduction of the polysilicon interconnection layer will easily lead to a decrease in the electrical performance of the formed semiconductor device

Images