Manufacturing method of CMOS thin film transistor and manufacturing method of LTPS array substrate

Abstract

The invention discloses a manufacturing method of a CMOS thin film transistor and a manufacturing method of an LTPS array substrate; manufacturing method of the CMOS thin film transistor comprises thefollowing steps of providing a substrate, and sequentially forming an active layer, a gate layer and a photoresist layer on the substrate, wherein the active layer comprises a first region, a secondregion and a third region; patterning the photoresist layer by using a photomask, so that the second region is not covered by the photoresist layer, and the first region and the third region are covered by the remaining photoresist; performing first-degree doping on the second region; removing residual photoresist; and carrying out second-degree doping on the first region. By means of the mode, the number of the photo masks in the manufacturing process can be reduced, the manufacturing period is shortened, and the manufacturing cost is lowered.

Description

technical field [0001] The present application relates to the field of display technology, in particular to a method for manufacturing a CMOS thin film transistor and an LTPS array substrate. Background technique [0002] Thin-Film Transistor (TFT) technology can be divided into polysilicon (Poly-Si) technology and amorphous silicon (a-Si) technology, the difference between the two lies in the characteristics of transistors. Compared with traditional A-Si technology, Low Temperature Poly-Silicon (LTPS) technology is widely used in small and medium-sized high-resolution TFT LCDs and Fabrication of AMOLED panels. According to its production method, LTPS is mainly divided into N-type metal oxide semiconductor (Negative channel Metal Oxide Semiconductor, NMOS), P-type metal oxide semiconductor (Positive channel MetalOxide Semiconductor, PMOS) and complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor). , CMOS), where the main difference between NMOS t...

AI Technical Summary

Problems solved by technology

[0004] The above production process requires multiple photomask processes. Compared with the amorphous silicon process, the production process is more complicated, and the overall equipment investment is too large and the yield rate is too low, and the production cost increases accordingly. Therefore, how to effectively reduce the LTPS CMOS array The production cycle of substrates, improving production capacity and reducing costs are the focus of the current panel industry

Images