Semiconductor processing apparatus and methods for calibrating semiconductor processing apparatus
A technology for processing equipment and semiconductors, applied in semiconductor/solid-state device manufacturing, chemical instruments and methods, crystal growth, etc., can solve the problems of not providing effective methods for thermally calibrated chemical vapor deposition systems, time-consuming, and high costs
Pending Publication Date: 2018-12-28
ASM IP HLDG BV
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- Abstract
- Description
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- Application Information
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Problems solved by technology
However, existing "tool-to-tool matching" systems and processes can be limiting, time-consuming, cost-prohibitive, and may not provide an efficient way to thermally calibrate multiple CVD systems
Method used
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[0020] While certain embodiments and examples are disclosed below, those skilled in the art will understand that the invention extends beyond the specifically disclosed embodiments and / or uses of the invention and obvious modifications and equivalents thereof. Therefore, it is intended that the scope of the present disclosure should not be limited by the specific disclosed embodiments described below.
[0021] As used herein, the term "substrate" may refer to any underlying material that may be used, or on which a device, circuit, or film may be formed.
[0022] Embodiments of the present disclosure may include semiconductor processing equipment as well as certain semiconductor processing equipment configured for chemical vapor deposition processes. The semiconductor processing apparatus of the present disclosure may include a quartz reaction chamber that may operate under reduced pressure and thus may include a plurality of ribs that reinforce the reaction chamber and prevent...
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Abstract
A semiconductor processing apparatus is disclosed. The semiconductor processing apparatus may include: a reaction chamber comprising an upper chamber wall and a lower chamber wall connected by vertical sidewalls, the chamber walls being joined by an upstream inlet flange and a downstream outlet flange wherein a longitudinal direction of the chamber extends from the inlet flange to the outlet flange and a plurality of ribs provided on an outer surface of at least the upper chamber wall, the plurality of ribs being orientated transversely to the longitudinal direction of the chamber. The semiconductor processing apparatus may also include at least one array of heating elements disposed above the reaction chamber and at least one variable positioning device coupled to the at least one array of heating elements and configured to controllably adjust the position of the at least one array of heating elements relative to the position of the plurality of ribs. Methods of calibrating a semiconductor processing apparatus are also disclosed.
Description
technical field [0001] The present disclosure generally relates to semiconductor processing equipment and methods for calibrating semiconductor processing equipment. Background technique [0002] Layers of various materials can be deposited onto semiconductor substrates using high temperature reaction chambers. A semiconductor substrate, such as a silicon substrate, may be placed on a substrate holder inside the reaction chamber. Both the substrate and holder can be heated to the desired set point temperature. In an example substrate processing process, reactive gases may be passed over a heated substrate, causing chemical vapor deposition (CVD) of a thin layer of reactive material onto the substrate. Throughout subsequent deposition, doping, photolithography, etching, and other processes, these layers are fabricated into integrated circuits. [0003] Various process parameters can be carefully controlled to ensure high quality of the deposited layer. An example of one s...
Claims
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IPC IPC(8): H01L21/67
CPCH01L21/67011H01L21/67115H01L21/67248C23C16/4583C23C16/46H01L21/67098H01L21/67017H01L21/67259H01L21/683H01L21/324C30B25/10C30B25/105
Inventor S·拉贾贝鲁J·托尔R·麦克卡特尼
Owner ASM IP HLDG BV