Signal band-pass filter processing method and system based on FPGA

Abstract

The invention discloses a signal band-pass filter processing method and system based on FPGA. The method comprises the following steps: obtaining a quadrature demodulated signal according to an inputsignal in FPGA; performing CIC extraction filtering on the quadrature demodulated signal, and obtaining the initial filtered signal; performing FIR filtering on the initial filtered signal, and obtaining the target filtered signal. The invention realizes quadrature demodulation and filtering by digital method, and cascades CIC filtering and FIR supplementary filtering, which not only alleviates the pressure of analog circuit design, improves the precision of quadrature demodulation, but also greatly saves the resource overhead of FPGA.

Description

technical field [0001] The invention belongs to the field of signal band-pass filter processing, and relates to an FPGA-based signal band-pass filter processing method and system. Background technique [0002] In a specific working environment, it is necessary to filter the working signal of a specific frequency to reduce the influence of noise. And this kind of device that allows waves of a specific frequency band to pass while blocking other frequency bands is a bandpass filter. Due to the complex design of the band-pass filter, people use signal quadrature demodulation and low-pass filtering to achieve the band-pass filtering effect. [0003] In the traditional field, an analog circuit is generally used to perform quadrature and filtering on data, and then cooperate with a finite impulse response digital (Finite Impulse Response, FIR for short) low-pass filter to realize a band-pass function. [0004] Although this method has optimized the data processing flow to a cert...

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Problems solved by technology

[0004] Although this method has optimized the data processing flow to a certain extent, there are still the following problems: (1) the FIR low-pass filter is to be realized by multifactorial addition, and this method is limited for the FPGA (full name of multiplier: Field-Programmable Gate Array, Chinese: Field Programmable Gate Array) is a great waste of resources; (2) In terms of filtering effect, FIR is difficult to achieve narrow bandwidth low-pass with fewer coefficients filter

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