Rapid IO switching network

A technology of switching networks and switches, applied in the field of airborne computers, to achieve the effects of high bandwidth, high reliable data transmission performance, and low delay

Inactive Publication Date: 2019-01-15
CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
View PDF5 Cites 18 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] At present, with the continuous improvement of the function and performance requirements of the airborne avionics system, the open avionics architecture has higher and higher requirements for data exchange, data transmission rate and scale amo

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Rapid IO switching network
  • Rapid IO switching network

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0042] The present invention will be further described in detail below with reference to the drawings and embodiments.

[0043] A RapidIO switching network provided by this embodiment, for its hardware structure, see figure 1 As shown, the RapidIO switching network includes multiple nodes and multiple switches. The nodes are P2020 processing chips, and the switches are CPS1848 switch chips. Multiple nodes are connected by switches to form a RapidIO network to realize high-speed data communication between multiple nodes.

[0044] RapidIO switching network driver software includes RapidIO network configuration function, Doorbell doorbell interrupt function, Mailbox data transmission function and DirectIO data transmission function. Its relationship with the underlying hardware is as figure 2 Shown:

[0045] 1. RapidIO network configuration

[0046] The RapidIO network configuration includes the configuration of each P2020 processing chip and CPS1848 switch.

[0047] The RapidIO network...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a rapid IO switching network, which is composed of a plurality of P2020 processing chips as nodes and a plurality of CPS1848 switching chips as switches. As the master node, the P2020 processor uses DFS algorithm to search the whole network topology in the initialization process, Enumerate all RapidIO devices in the network, get the number of nodes and switches and the connection relationship between the devices, on this basis, dynamically configure the routing table to complete the network initialization configuration. Each terminal node in RapidIO network realizes thehigh-speed data communication among Doorbell, Mailbox and DirectIO nodes by configuring its own registers. The invention realizes the function of RapidIO networking communication, and provides support for wide application of RapidIO bus in modern avionics system.

Description

Technical field [0001] The invention belongs to the field of airborne computers in avionics systems, and particularly relates to embedded avionics interconnection technology based on RapidIO bus technology. Background technique [0002] At present, with the continuous improvement of the function and performance requirements of the airborne avionics system, the open avionics architecture has higher and higher requirements for the data exchange and data transmission rate and scale of the various functional modules within the system. Higher requirements have been put forward. The traditional parallel bus has become the bottleneck of high-speed computing and processing systems due to the limitation of clock frequency and signal routing. How to choose a suitable bus to meet the needs of new avionics architecture has become a hot spot in the industry. [0003] The RapidIO and PCI Express in the high-speed serial bus are the leaders in the board-level interconnection and chip-level inter...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H04L12/933H04L12/741H04L45/74
CPCH04L45/54H04L45/74H04L49/102
Inventor 成婧徐世杰曲国远杨漫周海兵
Owner CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products