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A TSV hole filling method

A technology of aperture and blind hole, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as poor effect, low filling rate, and excessively thick surface Cu layer, to simplify operation complexity and reduce processing. Effects of difficulty, good orifice condition

Active Publication Date: 2019-01-25
NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Blind hole filling and plating is very difficult, and breakthrough improvements are often required, such as changing the slope state of the insulating layer in the hole, eliminating residual bubbles at the bottom of the blind hole, improving the composition of the plating solution, etc. These improvements are time-consuming and laborious, and the effect is not good
In contrast, through hole filling and plating is less difficult and easy to operate, but it faces the problem of too thick Cu layer on the surface and low filling rate
The existing technology can improve the filling effect through bottom bonding, electrochemical plating, etc., but the process is still relatively cumbersome

Method used

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Embodiment Construction

[0044] Hereinafter, the present invention will be further described in conjunction with the drawings and specific embodiments.

[0045] Such as Figure 1 to 4 As shown, a TSV hole filling method specifically includes the following steps:

[0046] (1) Perform photolithography and etching on the front surface of the Si substrate to obtain blind holes with a diameter of 5 to 150 μm and a depth of 100 to 350 μm, and then remove the glue. The processed structure is as follows figure 1 Shown

[0047] (2) Grind and polish the back of the substrate treated in step (1) until the etching holes are exposed, clean, dry, and grow SiO on both sides 2 Layer, the processed structure is like figure 2 Shown

[0048] (3) The substrate processed in step (2) is subjected to backside filming treatment;

[0049] When the substrate is subjected to back filming treatment, a filming machine is used to paste UV film, blue film, etc. on the back of the silicon wafer, and the excess film is cut along the edge of ...

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PUM

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Abstract

The invention discloses a TSV hole filling method, belonging to the technical field of microelectronic components. The method etches blind holes on silicon substrate, polishes and polishes to form through holes, and then through through hole sputtering, pretreatment, step electroplating and other processes, the TSV copper holes with filling ratio of up to 100% can be obtained. The method of the invention has the advantages of simple process and high filling rate, and the method is simple and easy to operate, has good consistency, is convenient for batch production, is particularly suitable forhigh-density electrical interconnection application, and is the key technology for realizing high-speed, high-frequency and high-density components.

Description

Technical field [0001] The invention belongs to the technical field of microelectronic components, and specifically relates to a TSV hole filling method. Background technique [0002] With the continuous increase in application requirements, the development of electronic products has accelerated, and higher requirements have been put forward on the transmission speed, frequency of use, and integration of components. As an emerging technology, TSV (Through Silicon Via) is particularly suitable for high-speed, high-frequency, and high-density components, and it plays a vital role. [0003] In the TSV preparation process, the filling process is a key process, and its filling quality directly affects the transmission characteristics, thermal characteristics, and integration characteristics, which is the focus of the research. At present, commonly used TSV hole filling includes blind hole filling plating and through hole filling plating. Blind holes are difficult to fill and plate, an...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768
CPCH01L21/76802H01L21/76853H01L21/76873H01L21/76882
Inventor 赵飞贾世旺党元兰刘晓兰徐亚新周拥华龚孟磊庄治学
Owner NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
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