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NAND devices, methods and systems for voltage degradation aware NAND array management

A voltage and array technology, applied in electrical digital data processing, instruments, static memory, etc., can solve problems such as memory density of 2D memory arrays

Inactive Publication Date: 2019-03-05
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there is a technical limit to the size reduction of individual memory cells, and thus the memory density of 2D memory arrays

Method used

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  • NAND devices, methods and systems for voltage degradation aware NAND array management
  • NAND devices, methods and systems for voltage degradation aware NAND array management
  • NAND devices, methods and systems for voltage degradation aware NAND array management

Examples

Experimental program
Comparison scheme
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example 1

[0090] Example 1 is a NAND device for voltage degradation aware NAND array management, the NAND device comprising: a NAND array; and a controller to: monitor voltage to the NAND device to detect a voltage event; A voltage event modifies a history of voltage events; observes voltage conditions from the history of voltage events; and modifies an operating parameter of the NAND array in response to the voltage conditions.

[0091] In Example 2, the subject matter of Example 1 includes wherein, to modify the operating parameter, the controller changes an error handling routine of the NAND array.

[0092] In Example 3, the subject matter of Example 2 includes wherein the error handling procedure is a read retry procedure.

[0093] In Example 4, the subject matter of Examples 2-3 includes wherein the error handling procedure is a program erase procedure.

[0094] In Example 5, the subject matter of Examples 2-4 includes wherein the error handling program is a bad block marking prog...

example 14

[0103] Example 14 is a method for voltage degradation aware NAND array management, the method comprising: monitoring voltage to a NAND device to detect a voltage event; modifying a history of voltage events with the voltage event; modifying a history of voltage events from the history of voltage events observing voltage conditions; and modifying operating parameters of a NAND array in the NAND device in response to the voltage conditions.

[0104] In Example 15, the subject matter of Example 14 includes wherein modifying the operating parameter includes changing an error handling procedure for the NAND array.

[0105] In Example 16, the subject matter of Example 15 includes wherein the error handling procedure is a read retry procedure.

[0106] In Example 17, the subject matter of Examples 15-16 includes wherein the error handling procedure is a program erase procedure.

[0107] In Example 18, the subject matter of Examples 15-17 includes wherein the error handling program i...

example 27

[0116] Example 27 is at least one machine-readable medium containing instructions that, when executed by a processing circuit, cause the processing circuit to perform any of the methods of Examples 14-26.

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Abstract

The invention relates to NAND devices, methods and systems for voltage degradation aware NAND array management. Devices and techniques for voltage degradation aware NAND array management are disclosedherein. Voltage to a NAND device is monitored to detect a voltage event. A history of voltage events is modified with the voltage event. A voltage condition is observed from the history of voltage events. An operational parameter of a NAND array in the NAND device is then modified in response to the voltage condition.

Description

technical field [0001] The present invention generally relates to memory devices. Background technique [0002] Memory devices are typically provided as internal semiconductor integrated circuits in computers or other electronic devices. There are many different types of memory, including volatile and non-volatile memory. [0003] Volatile memory requires power to maintain its data and includes Random Access Memory (RAM), Dynamic Random Access Memory (DRAM) or Synchronous Dynamic Random Access Memory (SDRAM), among others. [0004] Nonvolatile memory retains stored data when not powered and includes flash memory, read only memory (ROM), electrically erasable programmable ROM (EEPROM), static RAM (SRAM), erasable Programmable ROM (EPROM), resistance variable memory, such as phase change random access memory (PCRAM), resistive random access memory (RRAM), magnetoresistive random access memory (MRAM) or 3D XPointTM memory, etc. [0005] Flash memory is used as non-volatile m...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/30G11C16/34
CPCG11C16/30G11C16/3404G11C16/26G11C16/349G11C16/0483G11C16/3431G11C16/10G06F13/16
Inventor S·A·琼H·桑吉迪
Owner MICRON TECH INC