On-chip Network Optimization Method Based on Approximate Computing

A network-on-chip and optimization method technology, which is applied in the direction of data exchange network, digital transmission system, electrical components, etc., can solve the problem of not using the tolerance of the application program

Active Publication Date: 2021-08-20
SOUTH CHINA UNIV OF TECH +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The above patent application only optimizes the network by adjusting the positional relationship of the IP core in the on-chip network, and does not take advantage of the tolerance of the application program for errors in the output

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  • On-chip Network Optimization Method Based on Approximate Computing
  • On-chip Network Optimization Method Based on Approximate Computing
  • On-chip Network Optimization Method Based on Approximate Computing

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Embodiment Construction

[0041] The present invention will be further described in detail below in conjunction with the embodiments and the accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0042] see Figure 4 , C represents the processor core in the network on chip node, M represents the processor Cache (cache memory), R represents the router, and NI represents the network interface. The on-chip network optimization method based on approximate calculation of the present invention includes several parts: a flow predictor, a data clipper, a data restorer, a global controller and a local controller. in:

[0043] Such as figure 1 As shown, the traffic predictor runs on each node L, and at the beginning of each regulation interval, according to the past operating conditions of the node, predicts the communication situation of the data flow sent by the node in the interval, and sends it to the master Control node G.

[0044] Each node of the network on chip i...

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Abstract

The invention discloses an on-chip network optimization method based on approximate calculation, which includes a data clipper, a data restorer, a flow predictor, a global controller and a local controller; Carry out tailoring to shorten the length of the data packet; the data restorer restores the lost data after receiving the trimmed data packet; the traffic predictor predicts the data flow in the next control interval according to the past node communication situation; the global controller is used for From a global perspective, the optimal configuration of each node is calculated based on the global information and the quality requirements of users, and the control information is sent to each node; the local controller, according to the received control information, injects into the network for each Data packets are configured for the data loss rate. The method can optimize the performance and power consumption of the network on chip at a lower cost without violating the user's requirements on the output quality.

Description

technical field [0001] The invention relates to the technical field of network optimization, in particular to an on-chip network optimization method based on approximate calculation. Background technique [0002] In the context of the flattening of semiconductor process upgrades, many-core chips are an effective design to improve system performance-power consumption ratio. Facing the requirements of many-core chips in communication bandwidth, low power consumption, and scalability, etc., network-on-chip is considered to be a promising technology. Many popular applications in fields such as image processing and machine learning have the characteristics of large data communication volume and tolerance of certain output error. Therefore, approximate computing is a new computer design idea, by relaxing the requirements for accuracy of results , to improve system performance or save system energy consumption. However, the error tolerance of the application is not or seldom util...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/24H04L12/26H04L12/823H04L12/933H04L47/32
CPCH04L41/0823H04L41/145H04L41/147H04L43/0882H04L47/32H04L49/109H04L41/142
Inventor 肖思源王小航潘文明
Owner SOUTH CHINA UNIV OF TECH
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