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Manufacturing method of shallow trench isolation structure

A technology of isolation structure and manufacturing method, which is applied in the field of manufacturing shallow trench isolation structures, and can solve problems such as substandard quality and inability to etch

Inactive Publication Date: 2019-04-19
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] When the wafer is etching shallow trenches, a total of 25 wafers are placed on the wafer boat. At the beginning, the wafer boat is placed in the non-etching cavity (VCE), and then it is passed from the first wafer to the etching one by one. Etching is carried out in the cavity, and the gas used during etching is mainly HBr or Cl 2 or CF 4 , These gases are easy to react with the film to form a polymer that adheres to the wafer. When the wafer is etched and returned to the non-etched cavity, the polymer adhered to the surface will volatilize, and then the non-etched The aluminum material on the surface of the etched cavity reacts, forming some particles that fall off and fall onto the wafer on the top layer. When the wafer is etched, the amount of etching is greatly affected, resulting in etching. If the quality is not up to standard, it is more likely that it will not be able to etch

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  • Manufacturing method of shallow trench isolation structure
  • Manufacturing method of shallow trench isolation structure
  • Manufacturing method of shallow trench isolation structure

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Embodiment Construction

[0025] The specific implementation manner of the present invention will be described in more detail below with reference to schematic diagrams. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0026] Please refer to figure 1 , the invention provides a method for fabricating a shallow trench isolation structure, comprising:

[0027] S11: providing a substrate;

[0028] S12: sequentially forming an oxide layer, a polysilicon layer, a mask layer, and a bottom anti-reflection coating on the substrate;

[0029] S13: Etching the bottom anti-reflective coating, the mask layer, the polysilicon layer, the oxide layer and the substrate in sequence

[0030] S14: forming a shallow trench on the substrate;

[...

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Abstract

The invention provides a manufacturing method of a shallow trench isolation structure. The manufacturing method comprises the steps of: providing a substrate; sequentially forming an oxide layer, a polycrystalline silicon layer, a mask layer and a bottom part anti-reflection coating on the substrate; sequentially etching the bottom part anti-reflection coating, the mask layer, the polycrystallinesilicon layer, the oxide layer and the substrate; forming a shallow trench in the substrate; cleaning the shallow trench; and filling the shallow trench with an isolation material to form the shallowtrench isolation structure. According to the manufacturing method of the shallow trench isolation structure, the shallow trench is cleaned to remove a polymer after the shallow trench is etched for isolation, thereby preventing the polymer from volatilizing and contaminating other wafers that are not etched, further preventing the production of particles affecting wafer etching in the subsequent steps, and finally improving the quality of wafer etching.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a shallow trench isolation structure. Background technique [0002] In the integrated circuit manufacturing process, the quality of the wafer (wafer) processing technology has a decisive influence on the working performance of the circuit. Among them, making shallow trench isolation (STI) is the front-end basic process of the entire integrated circuit processing. [0003] When the wafer is etching shallow trenches, a total of 25 wafers are placed on the wafer boat. At the beginning, the wafer boat is placed in the non-etching cavity (VCE), and then it is passed from the first wafer to the etching one by one. Etching is carried out in the cavity, and the gas used during etching is mainly HBr or Cl 2 or CF 4 , These gases are easy to react with the film to form a polymer that adheres to the wafer. When the wafer is etched and returned to the non...

Claims

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Application Information

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IPC IPC(8): H01L21/762
CPCH01L21/76224
Inventor 陈宏
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP