Unlock instant, AI-driven research and patent intelligence for your innovation.

Chip with isolation structure

An isolation structure and chip technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as analog circuit function failure, digital circuit interference, and circuit interference

Active Publication Date: 2021-05-07
ZGMICRO HEFEI LTD
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But there will be a problem that one circuit interferes with another circuit. For example, Part_A is a digital circuit with a lot of noise (Part_A can be called a noise circuit), and Part_B is an analog circuit that is sensitive to noise (Part_B can be called a sensitive circuit).
This will cause the interference of the digital circuit to the analog circuit, reduce the performance of the analog circuit, and cause the function of the analog circuit to fail in severe cases.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Chip with isolation structure
  • Chip with isolation structure
  • Chip with isolation structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0029] Reference herein to "one embodiment" or "an embodiment" refers to a particular feature, structure or characteristic that can be included in at least one implementation of the present invention. "In one embodiment" appearing in different places in this specification does not all refer to the same embodiment, nor is it a separate or selective embodiment that is mutually exclusive with other embodiments. Unless otherwise specified, the words connected, connected, and joined in this document mean that they are electrically connected directly or indirectly.

[0030] Based on attached figure 1 Regarding the noise interference problem between Part_A and Part_B, the inventor conducted a lot of research and analysis and found that ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention provides a chip with an isolation structure, which includes a wafer. The wafer includes: a substrate; a first circuit formed on the substrate; a circuit formed on the substrate adjacent to the first circuit. The second circuit; the isolation trench, which is located in the substrate portion between the first circuit and the second circuit, wherein the substrate portion between the first circuit and the second circuit is called the substrate gap region; the metal connection layer , which is located on the first surface of the substrate and straddles the substrate gap region, and the metal connection layer is used to electrically connect the first circuit and the second circuit. Compared with the prior art, the first circuit and the second circuit in the present invention are located on the same substrate, and the substrate portion between the first circuit and the second circuit is cut by laser to form an isolation trench, thereby Enhanced circuit isolation performance.

Description

【Technical field】 [0001] The invention relates to the technical field of chip design, in particular to a chip with an isolation structure, which can enhance circuit isolation performance. 【Background technique】 [0002] In chip design, enhancing the isolation between circuits can reduce the influence of noisy circuits on sensitive circuits. Please refer to figure 1 As shown, it describes a schematic diagram of integrating Part_A and Part_B two circuits on the same chip in the prior art. The advantage of this is high integration and high processing efficiency. But there will be a problem that one circuit interferes with another circuit, for example, Part_A is a digital circuit with a lot of noise (Part_A can be called a noise circuit), and Part_B is an analog circuit sensitive to noise (Part_B can be called a sensitive circuit). In this way, the interference of the digital circuit to the analog circuit will be generated, the performance of the analog circuit will be reduce...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02H01L21/764
CPCH01L21/764H01L27/0251
Inventor 王钊
Owner ZGMICRO HEFEI LTD