A time sequence configurable multi-channel dynamic video simulation method and a processing system thereof

A technology of video processing and simulation method, which is applied in the field of video processing, can solve the problems that HDMI video output signal frame frequency, timing characteristics and resolution cannot be adjusted online, and limit the diversification of output video, so as to facilitate problem analysis and maintenance, shorten The design cycle and the effect of real-world debugging

Inactive Publication Date: 2019-05-03
XIAN MICROELECTRONICS TECH INST
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AI Technical Summary

Problems solved by technology

However, the frame rate, timing characteristics and resolution of each HDMI video output signal cannot be adjusted online, which limits the diversification of output video

Method used

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  • A time sequence configurable multi-channel dynamic video simulation method and a processing system thereof
  • A time sequence configurable multi-channel dynamic video simulation method and a processing system thereof
  • A time sequence configurable multi-channel dynamic video simulation method and a processing system thereof

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Embodiment Construction

[0038] see figure 1 , the present invention provides a multi-channel dynamic video processing system with configurable timing, including an interface module, a video decoding module, an RGB / YCbCr data cache module, a data reading module, a data writing module, a memory timing control module, a control interface module, A control command analysis module, an output data buffer module, a timing generation module, a protocol generation module and an output interface module.

[0039] The interface module is connected to the video decoding module, the video decoding module is connected to the RGB / YCbCr data buffer module, the RGB / YCbCr data buffer module is connected to the data writing module, the data writing module is connected to the memory timing control module, and the memory timing control module is connected to the data reading module connected, the data reading module is connected with the output data cache module, the output data cache module is connected with the timing g...

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Abstract

The invention discloses a time sequence configurable multi-channel dynamic video simulation method and a processing system thereof. The system comprises an interface module, a video decoding module, an RGB/YCbCr data caching module, a data writing module, a memory time sequence control module, a data reading module, an output data caching module, a time sequence generation module, a protocol generation module and an output interface module which are sequentially connected; the control interface module is connected with the time sequence generation module through a control command analysis module. According to the invention, any customized dynamic video can be received; According to the invention, multiple paths of dynamic video images are independently output, the frame frequency, resolution and time sequence characteristics of the dynamic video images can be independently adjusted on line, any video can be converted into multiple paths of dynamic videos with different frame frequencies, resolutions and time sequence characteristics, the research and development cost of image processing equipment is reduced, and the research and development cost of matched products is reduced; Thebatch production capability of the image processing equipment is improved, simultaneous debugging and testing of a plurality of image processing equipment are met, and the production period is shortened.

Description

technical field [0001] The invention belongs to the technical field of video processing, and in particular relates to a timing configurable multi-channel dynamic video simulation method and a processing system thereof. Background technique [0002] The existing public name is HDMI interface ultra-high-definition image signal source, which outputs 2 HDMI signals, and the user's TV production line measures the HDMI interface of the TV. After the signal source is powered on, the ARM will save the image content from the SD card and load it into the DDR3 memory stick through the FPGA, and then the FPGA will read the image in the DDR3 memory stick and output it to the LVDS port of the FPGA, and then transfer from LVDS to HDMI The chip converts the HDMI signal and outputs it to the HDMI interface. The output image is only a picture and cannot be changed online, only by rewriting the SD card. [0003] Research on FPGA-based PCIe-Camera Link image signal simulation source (Master's...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N21/426H04N21/433H04N21/44H04N21/4402
Inventor 赵建妮卢强唐雪寒
Owner XIAN MICROELECTRONICS TECH INST
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