CMOS thin film transistor, manufacturing method thereof, and array substrate

Abstract

The invention provides a CMOS thin film transistor, a manufacturing method thereof and an array substrate. The method for manufacturing the CMOS thin film transistor comprises the following steps: forming a semiconductor layer on a substrate, wherein the semiconductor layer comprises an N-type region and a P-type region which are arranged on the same layer at an interval, the N-type region is sequentially divided into a first region, a second region, a third region, a fourth region and a fifth region and is used for forming an N-type thin film transistor, and the P-type region is sequentiallydivided into a sixth region, a seventh region and an eighth region and is used for forming a P-type thin film transistor; performing first N-type ion doping of the first region and the fifth region; performing first P-type ion doping of the N-type region; performing second P-type ion doping of the N-type region and the P-type region; performing second N-type ion doping of the first region, the second region, the fourth region, the fifth region, the sixth region and the eighth region; and performing the third P-type ion doping of the sixth region and the eighth region, wherein the first N-typeion doping and the first P-type ion doping are carried out through the same halftone mask plate. Therefore, the manufacturing process time can be shortened, and the manufacturing cost can be reduced.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a CMOS thin film transistor, a manufacturing method thereof, and an array substrate. Background technique [0002] The existing CMOS (complementary metal oxide semiconductor) products of TFT-LCD need to be formed by multiple channel doping (P-type ion doping or N-type ion doping) in the manufacturing process of the array substrate (Array substrate). MOS tube (field effect tube), but due to the difference in design and working principle of PMOS (P-type metal-oxide-semiconductor) and NMOS (N-type metal-oxide-semiconductor), it is necessary to carry out multiple processes successively in the Array process. Secondary doping (Doping) process, including: channel doping (Channel Doping), threshold voltage doping (Vth Doping), N+Doping, lightly doped drain structure (LDD Doping) and P+Doping, the process flow is complex, so The process time is longer and the cost is higher. ...

AI Technical Summary

Problems solved by technology

[0002] The existing CMOS (complementary metal oxide semiconductor) products of TFT-LCD need to be formed by multiple channel doping (P-type ion doping or N-type ion doping) in the manufacturing process of the array substrate (Array substrate). MOS tube (field effect tube), but due to the difference in design and working principle of PMOS (P-type metal-oxide-semiconductor) and NMOS (N-type metal-oxide-semiconductor), it is necessary to carry out multiple processes successively in the Array process. Secondary doping (Doping) process, including: channel doping (Channel Doping), threshold voltage doping (Vth Doping), N+Doping, lightly doped drain structure (LDD Doping) and P+Doping, the process flow is complex, so Longer process time and higher cost

[0003] Therefore, the research on CMOS thin film transistors needs to be deepened

Images