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A LDO Circuit with Enhanced Power Supply Rejection Ratio and Transient Response

A technology of power supply rejection ratio and transient response, which is applied in the direction of adjusting electrical variables, control/regulation systems, instruments, etc., can solve the problem that the high-frequency PSR performance is not significantly improved, the power supply voltage drop of the LDO circuit is increased, and the transient response cannot be improved Characteristics and other issues, to achieve the effect of improving transient response speed, reducing leakage current, and simple structure

Active Publication Date: 2020-06-02
NINGBO UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, technologies such as connecting RC filters and using NMOS tubes as power tubes will increase the power supply voltage drop of the LDO circuit, and cannot improve the transient response characteristics; the optimization technology of the cascaded multi-stage LDO circuit can improve the transient response characteristics. However, the power consumption of the circuit is large, and the high-frequency PSR performance has not been significantly improved

Method used

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  • A LDO Circuit with Enhanced Power Supply Rejection Ratio and Transient Response
  • A LDO Circuit with Enhanced Power Supply Rejection Ratio and Transient Response
  • A LDO Circuit with Enhanced Power Supply Rejection Ratio and Transient Response

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Embodiment Construction

[0018] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0019] Embodiments of LDO circuits with enhanced power supply rejection ratio and transient response, such as figure 1 As shown, it includes an LDO basic circuit 1, a PSR enhancer 2 and a transient enhancer 3, and the PSR enhancer 2 and the transient enhancer 3 are respectively connected to the LDO basic circuit 1.

[0020] In this embodiment, the LDO basic circuit 1 includes a first error amplifier EA, a power transistor MP, and a load capacitor C L , load resistance R L , Phase compensation resistor R 3 , the first voltage divider resistor R 1 and the second divider resistor R 2 , the source end of the power transistor MP is connected to the input power supply V of the LDO circuit in , the drain terminal of the power transistor MP and the first voltage dividing resistor R 1 One end of the LDO circuit is respectively connected to the ou...

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Abstract

The invention discloses a power supply rejection ratio and trainset response-enhanced LDO circuit. The LDO circuit comprises an LDO basic circuit, a PSR intensifier, and a transient intensifier; and each of the PSR intensifier and the transient intensifier is connected with the LDO basic circuit. A gate end of a power tube in the LDO basic circuit is connected with a capacitance-adjustable negative capacitor by utilizing the PSR intensifier, the negative capacitor can reduce a gate source dynamic voltage of the power tube as zero, thereby effectively reducing the leakage current of a small power tube, inhibiting the noise of an external input power supply, and improving noise inhibition performance of the LDO circuit, and the LDO circuit has the advantages of being simple in structure andhigh in power supply rejection ratio, and the LDO circuit has the advantages of being simple in structure and high in power supply rejection ratio; and meanwhile, a first detection capacitor and a second detection capacitor in a voltage detection circuit are used for detecting voltage change of an output end of the LDO circuit in real time; the charging / discharging current is provided for the gateend of the power tube through an embedded transient intensifier, the transient response speed of the LDO circuit is effectively improved, and the overshoot voltage and the pitching voltage output bythe LDO circuit are reduced.

Description

technical field [0001] The invention relates to the field of low-dropout linear regulators (LDO), in particular to an LDO circuit with enhanced power supply rejection ratio (Power Supply Rejection, PSR) and transient response. Background technique [0002] Low-dropout linear regulators (LDOs) are an important part of power management systems, effectively implementing noise isolation between switching power converters and RF circuits and other noise-sensitive circuit blocks. In order to improve the power supply rejection ratio of the LDO, the traditional LDO usually connects an external large capacitor to filter the power supply noise through the capacitor and realize the stability of the negative feedback system. However, the off-chip capacitor needs to occupy a large area of ​​the printed circuit board, which is not conducive to system integration and Miniaturized design. LDO circuits without off-chip capacitors use frequency compensation technology to stabilize the system...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
CPCG05F1/56
Inventor 钱利波何锡涛钱科芳励达夏银水
Owner NINGBO UNIV
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