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Power electronic circuit fault diagnosis method based on extremely random forest and stacked sparse auto-encoding algorithm

A power electronic circuit, sparse self-encoding technology, applied in the direction of electronic circuit testing, neural learning methods, CAD circuit design, etc., to achieve the effect of improving accuracy

Active Publication Date: 2019-09-27
WUHAN UNIV
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  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Aiming at the limitations of current fault diagnosis methods, the present invention provides a fast and accurate device-level fault location for power electronic circuits that combines extreme random forest and stacked sparse self-encoding method

Method used

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  • Power electronic circuit fault diagnosis method based on extremely random forest and stacked sparse auto-encoding algorithm
  • Power electronic circuit fault diagnosis method based on extremely random forest and stacked sparse auto-encoding algorithm
  • Power electronic circuit fault diagnosis method based on extremely random forest and stacked sparse auto-encoding algorithm

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Embodiment Construction

[0035] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0036] A kind of power electronic circuit fault diagnosis method based on extreme random forest and stacked sparse self-encoding algorithm of the present invention comprises the following steps:

[0037] 1) Signal acquisition and feature extraction, EMD decomposition is performed on the current signal obtained under each fault state. This paper selects the first 7 order IMF components, calculates the time domain, frequency domain and energy characteristics of each order component, and obtains the original feature data set ;

[0038] 2) Dimension reduction preprocessing of fault features, using the...

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Abstract

The invention discloses a power electronic circuit fault diagnosis method based on an extremely random forest and a stacked sparse auto-encoding algorithm. The method comprises the following steps of signal acquisition and feature extraction; fault feature dimensionality reduction preprocessing, using an extreme tree algorithm ET to calculate importance scores of all features in an original feature data set, sorting the importance scores in descending order, determining the proportion to be removed, and obtaining a new feature set after removing the proportion; fault feature further extraction, using a stacked sparse auto-encoding SSAE algorithm to cascade multiple sparse self-encoders, and performing layer-by-layer feature extraction to obtain a hidden layer feature of a last sparse self-encoder as a fault sample; performing classification training, inputting fault samples in a training set and a test set into a classifier for training, and obtaining a trained classifier; and pattern recognition, using the trained classifier to classify and recognize faults of a power electronic circuit to be diagnosed, and locating the faults.

Description

technical field [0001] The invention relates to a fault diagnosis method for a power electronic circuit, in particular to a fault diagnosis method for a power electronic circuit based on an extreme random forest and a stacked sparse self-encoding algorithm. Background technique [0002] As a new basic subject of comprehensive application technology, power electronics technology is expanding its application fields with the advancement and development of technology. At present, power electronics technology can be seen in the fields of national defense, military, aerospace, power conversion and transmission, and information communication. use of the device. Among them, the power electronic circuit, as an important part of the power electronic device, is mainly composed of the main circuit and the control circuit. In actual work, the failure probability of the main circuit is much higher than that of other components. Faults may lead to abnormal working status of the entire sys...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/00G01R31/28G06K9/62
CPCG01R31/00G01R31/2846G06F18/241G06N3/08G06N20/20G06N5/01G06N3/045G06N20/00G01R31/318342G06F30/398G06F30/3308G06F30/33G06F18/2113
Inventor 何怡刚张亚茹何鎏璐
Owner WUHAN UNIV
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