Double frequency data transmitting device and its transmitting method
A technology of a data transmission device and a data transmission method, which is applied in the direction of electrical digital data processing, instruments, etc., can solve the problems of CPU processing efficiency waste, power consumption and energy consumption, etc., to increase memory bandwidth, reduce circuit scale, increase Effect of number of internal registers
Inactive Publication Date: 2003-03-19
北京多思技术服务有限公司
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However, the current computer architecture adopts a fixed structure and a fixed clock, the so-called "rigid" design. The most significant defect of this design is that most of the efficiency of CPU processing is wasted ( Especially in the process of word processing or network processing), however, the power consumption consumes energy with a fixed clock frequency
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[0025] figure 1 It is the overall structure and connection relationship diagram of the frequency multiplication data transmission device. The frequency multiplication data transmission device is composed of three parts: an internal register part 01, a frequency multiplication data transmission interface part 02 and an external memory part 03. The function of the frequency multiplication data transmission interface part 02 is to transfer data of 2 bus widths between the internal register part 01 and the external memory part 03 within one clock cycle. As shown in the figure, the frequency multiplication data transmission interface part 02 connects the chip's internal register part and the external memory part, and the chip transmits data between the internal register and the external memory through the frequency multiplication data transmission interface part 02. When data is stored in the memory from the register, the data in the register first enters the output part of the mu...
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The present invention relates to a double-frequency data transmission equipment and its transmission method. Said equipment is used to implement double-frequency input / output operation of data between internal registers with original and copy structure and external storage, i. e. in one clock cycle it can transmit data of two bus widthes. It includes double-frequency address component for controlling reading / writing of external storage, which can produce two addresses for reading- or writing external memory in one cycle in order to read and write two data from external storage. It also includes double-frequency data transmission interface connected between the external storage and internal registers for temporary latching of data in the course of transmission between external storage and internal registers.
Description
technical field [0001] The invention relates to the fields of computer architecture design and computer instruction system design, and also relates to the field of register file operation control and data transmission, and in particular to a macro-instruction set computer architecture microprocessor. Background technique [0002] The key to computer architecture design and its control design, instruction system design and its decoding design is to pursue the goal of doubling computer efficiency by using the least hardware resources and simple structure. However, the current computer architecture adopts a fixed structure and a fixed clock, the so-called "rigid" design. The most significant defect of this design is that most of the efficiency of CPU processing is wasted ( Especially in word processing or network processing), however power consumption consumes energy with a fixed clock frequency. [0003] In the 5,000-year history of civilization development, it can be said th...
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IPC IPC(8): G06F13/20
Inventor 王昭顺刘大力
Owner 北京多思技术服务有限公司