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Two-point modulator and control method thereof, DAC gain calibration method and device

A technology of gain calibration and modulation control, which is applied in the directions of analog/digital conversion calibration/test, digital-to-analog converter, code conversion, etc., and can solve problems such as high precision requirements and difficult calibration

Active Publication Date: 2019-11-19
SHANGHAI EASTSOFT MICROELECTRONICS
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, when calibrating the gain of the digital-to-analog converter in the two-point modulator, the accuracy of the analog-to-digital converter (Analog-to-Digital Converters, ADC) in the two-point modulator is high, and the calibration is difficult

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  • Two-point modulator and control method thereof, DAC gain calibration method and device
  • Two-point modulator and control method thereof, DAC gain calibration method and device
  • Two-point modulator and control method thereof, DAC gain calibration method and device

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Embodiment Construction

[0040] figure 1 It is a schematic diagram of the circuit structure of a two-point modulator. refer to figure 1 , the two-point modulator 1 may include: a phase-locked loop circuit 11 and a modulation control circuit 12 . Among them, the phase-locked loop circuit 11 has a built-in voltage-controlled oscillator 111 . The signal output by the voltage-controlled oscillator 111 in the phase-locked loop circuit 11 and the signal output by the modulation control circuit 12 via the voltage-controlled oscillator 111 are differential signals, and the modulation frequency is the same and the phase difference is 180 degrees.

[0041] Specifically, the phase-locked loop circuit 11 includes: a voltage-controlled oscillator 111, a frequency divider 112, a frequency and phase detector 113, a charge pump 114, a first low-pass filter 115, a delta-sigma modulator (Delta- Sigma Modulator, DSM) 116, first delay controller 117.

[0042] The first baseband signal S1 is input to the DSM 116 for D...

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Abstract

The invention discloses a two-point modulator, a control method thereof, a DAC gain calibration method and a device. The DAC gain calibration method comprises the following steps: amplifying the gainof the second modulation circuit by N times; calculating the gain of the first modulation circuit; inputting a first baseband signal into the first modulation circuit, and inputting a second basebandsignal into the second modulation circuit; respectively acquiring the loop feedback control voltage signal and the modulation control signal, a voltage value when the DAC input data is first data, anda voltage value when the DAC input data are second data; calculating to obtain the gain of the second modulation circuit; and calibrating the gain of the DAC. By applying the method, when the gain ofthe digital-to-analog converter in the two-point modulator is calibrated, the precision requirement on the analog-to-digital converter in the two-point modulator can be reduced, so that the design difficulty is reduced.

Description

technical field [0001] The invention relates to the technical field of two-point modulation, in particular to a two-point modulator, a control method thereof, and a DAC gain calibration method and device. Background technique [0002] In existing communication systems, Phase Locked Loop (PLL) is widely used in signal processing in addition to frequency synthesis, and the most prominent application is to implement phase modulation in a transmitter. [0003] The existing phase mode based on PLL can include open-loop modulation and closed-loop modulation. Among them, the open-loop modulation can achieve a relatively high data rate without being limited by the bandwidth of the PLL loop, but the modulation frequency drifts seriously, which will cause modulation errors and eventually lead to deterioration of the performance of the communication system. Compared with the open-loop modulation, the closed-loop modulation has a small modulation error under the adjustment of the PLL f...

Claims

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Application Information

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IPC IPC(8): H03M1/10H03M1/66
CPCH03M1/1028H03M1/66
Inventor 吕洁洁陈光胜
Owner SHANGHAI EASTSOFT MICROELECTRONICS
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